v2.4.9.2 -> v2.4.9.3
[opensuse:kernel.git] / drivers / block / DAC960.c
1 /*
2
3   Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5   Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6
7   This program is free software; you may redistribute and/or modify it under
8   the terms of the GNU General Public License Version 2 as published by the
9   Free Software Foundation.
10
11   This program is distributed in the hope that it will be useful, but
12   WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
13   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14   for complete details.
15
16   The author respectfully requests that any modifications to this software be
17   sent directly to him for evaluation and testing.
18
19 */
20
21
22 #define DAC960_DriverVersion                    "2.4.10"
23 #define DAC960_DriverDate                       "23 July 2001"
24
25
26 #include <linux/version.h>
27 #include <linux/module.h>
28 #include <linux/types.h>
29 #include <linux/blk.h>
30 #include <linux/blkdev.h>
31 #include <linux/completion.h>
32 #include <linux/delay.h>
33 #include <linux/hdreg.h>
34 #include <linux/blkpg.h>
35 #include <linux/interrupt.h>
36 #include <linux/ioport.h>
37 #include <linux/locks.h>
38 #include <linux/mm.h>
39 #include <linux/slab.h>
40 #include <linux/proc_fs.h>
41 #include <linux/reboot.h>
42 #include <linux/spinlock.h>
43 #include <linux/timer.h>
44 #include <linux/pci.h>
45 #include <asm/io.h>
46 #include <asm/segment.h>
47 #include <asm/uaccess.h>
48 #include "DAC960.h"
49
50
51 /*
52   DAC960_ControllerCount is the number of DAC960 Controllers detected.
53 */
54
55 static int
56   DAC960_ControllerCount =                      0;
57
58
59 /*
60   DAC960_ActiveControllerCount is the number of active DAC960 Controllers
61   detected.
62 */
63
64 static int
65   DAC960_ActiveControllerCount =                0;
66
67
68 /*
69   DAC960_Controllers is an array of pointers to the DAC960 Controller
70   structures.
71 */
72
73 static DAC960_Controller_T
74   *DAC960_Controllers[DAC960_MaxControllers] =  { NULL };
75
76
77 /*
78   DAC960_BlockDeviceOperations is the Block Device Operations structure for
79   DAC960 Logical Disk Devices.
80 */
81
82 static BlockDeviceOperations_T
83   DAC960_BlockDeviceOperations =
84     { open:                 DAC960_Open,
85       release:              DAC960_Release,
86       ioctl:                DAC960_IOCTL };
87
88
89 /*
90   DAC960_ProcDirectoryEntry is the DAC960 /proc/rd directory entry.
91 */
92
93 static PROC_DirectoryEntry_T
94   *DAC960_ProcDirectoryEntry;
95
96
97 /*
98   DAC960_NotifierBlock is the Notifier Block structure for DAC960 Driver.
99 */
100
101 static NotifierBlock_T
102   DAC960_NotifierBlock =    { DAC960_Finalize, NULL, 0 };
103
104
105 /*
106   DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
107   Copyright Notice, and Electronic Mail Address.
108 */
109
110 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
111 {
112   DAC960_Announce("***** DAC960 RAID Driver Version "
113                   DAC960_DriverVersion " of "
114                   DAC960_DriverDate " *****\n", Controller);
115   DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
116                   "<lnz@dandelion.com>\n", Controller);
117 }
118
119
120 /*
121   DAC960_Failure prints a standardized error message, and then returns false.
122 */
123
124 static boolean DAC960_Failure(DAC960_Controller_T *Controller,
125                               unsigned char *ErrorMessage)
126 {
127   DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
128                Controller);
129   if (Controller->IO_Address == 0)
130     DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
131                  "PCI Address 0x%X\n", Controller,
132                  Controller->Bus, Controller->Device,
133                  Controller->Function, Controller->PCI_Address);
134   else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
135                     "0x%X PCI Address 0x%X\n", Controller,
136                     Controller->Bus, Controller->Device,
137                     Controller->Function, Controller->IO_Address,
138                     Controller->PCI_Address);
139   DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
140   return false;
141 }
142
143
144 /*
145   DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
146   data structures for Controller.  It returns true on success and false on
147   failure.
148 */
149
150 static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
151 {
152   int CommandAllocationLength, CommandAllocationGroupSize;
153   int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
154   void *AllocationPointer = NULL;
155   if (Controller->FirmwareType == DAC960_V1_Controller)
156     {
157       CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
158       CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
159     }
160   else
161     {
162       CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
163       CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
164     }
165   Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
166   Controller->FreeCommands = NULL;
167   for (CommandIdentifier = 1;
168        CommandIdentifier <= Controller->DriverQueueDepth;
169        CommandIdentifier++)
170     {
171       DAC960_Command_T *Command;
172       if (--CommandsRemaining <= 0)
173         {
174           CommandsRemaining =
175             Controller->DriverQueueDepth - CommandIdentifier + 1;
176           if (CommandsRemaining > CommandAllocationGroupSize)
177             CommandsRemaining = CommandAllocationGroupSize;
178           CommandGroupByteCount =
179             CommandsRemaining * CommandAllocationLength;
180           AllocationPointer = kmalloc(CommandGroupByteCount, GFP_ATOMIC);
181           if (AllocationPointer == NULL)
182             return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
183           memset(AllocationPointer, 0, CommandGroupByteCount);
184         }
185       Command = (DAC960_Command_T *) AllocationPointer;
186       AllocationPointer += CommandAllocationLength;
187       Command->CommandIdentifier = CommandIdentifier;
188       Command->Controller = Controller;
189       Command->Next = Controller->FreeCommands;
190       Controller->FreeCommands = Command;
191       Controller->Commands[CommandIdentifier-1] = Command;
192     }
193   return true;
194 }
195
196
197 /*
198   DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
199   structures for Controller.
200 */
201
202 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
203 {
204   int i;
205   Controller->FreeCommands = NULL;
206   for (i = 0; i < Controller->DriverQueueDepth; i++)
207     {
208       DAC960_Command_T *Command = Controller->Commands[i];
209       if (Command != NULL &&
210           (Command->CommandIdentifier
211            % Controller->CommandAllocationGroupSize) == 1)
212         kfree(Command);
213       Controller->Commands[i] = NULL;
214     }
215   if (Controller->CombinedStatusBuffer != NULL)
216     {
217       kfree(Controller->CombinedStatusBuffer);
218       Controller->CombinedStatusBuffer = NULL;
219       Controller->CurrentStatusBuffer = NULL;
220     }
221   if (Controller->FirmwareType == DAC960_V1_Controller) return;
222   for (i = 0; i < DAC960_MaxLogicalDrives; i++)
223     if (Controller->V2.LogicalDeviceInformation[i] != NULL)
224       {
225         kfree(Controller->V2.LogicalDeviceInformation[i]);
226         Controller->V2.LogicalDeviceInformation[i] = NULL;
227       }
228   for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
229     {
230       if (Controller->V2.PhysicalDeviceInformation[i] != NULL)
231         {
232           kfree(Controller->V2.PhysicalDeviceInformation[i]);
233           Controller->V2.PhysicalDeviceInformation[i] = NULL;
234         }
235       if (Controller->V2.InquiryUnitSerialNumber[i] != NULL)
236         {
237           kfree(Controller->V2.InquiryUnitSerialNumber[i]);
238           Controller->V2.InquiryUnitSerialNumber[i] = NULL;
239         }
240     }
241 }
242
243
244 /*
245   DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
246   Firmware Controllers.
247 */
248
249 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
250 {
251   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
252   memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
253   Command->V1.CommandStatus = 0;
254 }
255
256
257 /*
258   DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
259   Firmware Controllers.
260 */
261
262 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
263 {
264   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
265   memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
266   Command->V2.CommandStatus = 0;
267 }
268
269
270 /*
271   DAC960_AllocateCommand allocates a Command structure from Controller's
272   free list.
273 */
274
275 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
276                                                        *Controller)
277 {
278   DAC960_Command_T *Command = Controller->FreeCommands;
279   if (Command == NULL) return NULL;
280   Controller->FreeCommands = Command->Next;
281   Command->Next = NULL;
282   return Command;
283 }
284
285
286 /*
287   DAC960_DeallocateCommand deallocates Command, returning it to Controller's
288   free list.
289 */
290
291 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
292 {
293   DAC960_Controller_T *Controller = Command->Controller;
294   Command->Next = Controller->FreeCommands;
295   Controller->FreeCommands = Command;
296 }
297
298
299 /*
300   DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
301 */
302
303 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
304 {
305   spin_unlock_irq(&io_request_lock);
306   __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
307   spin_lock_irq(&io_request_lock);
308 }
309
310
311 /*
312   DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
313 */
314
315 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
316 {
317   DAC960_Controller_T *Controller = Command->Controller;
318   void *ControllerBaseAddress = Controller->BaseAddress;
319   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
320   DAC960_V2_CommandMailbox_T *NextCommandMailbox =
321     Controller->V2.NextCommandMailbox;
322   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
323   DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
324   if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
325       Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
326     DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
327   Controller->V2.PreviousCommandMailbox2 =
328     Controller->V2.PreviousCommandMailbox1;
329   Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
330   if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
331     NextCommandMailbox = Controller->V2.FirstCommandMailbox;
332   Controller->V2.NextCommandMailbox = NextCommandMailbox;
333 }
334
335
336 /*
337   DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
338 */
339
340 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
341 {
342   DAC960_Controller_T *Controller = Command->Controller;
343   void *ControllerBaseAddress = Controller->BaseAddress;
344   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
345   DAC960_V2_CommandMailbox_T *NextCommandMailbox =
346     Controller->V2.NextCommandMailbox;
347   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
348   DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
349   if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
350       Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
351     DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
352   Controller->V2.PreviousCommandMailbox2 =
353     Controller->V2.PreviousCommandMailbox1;
354   Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
355   if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
356     NextCommandMailbox = Controller->V2.FirstCommandMailbox;
357   Controller->V2.NextCommandMailbox = NextCommandMailbox;
358 }
359
360
361 /*
362   DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
363   Controllers with Dual Mode Firmware.
364 */
365
366 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
367 {
368   DAC960_Controller_T *Controller = Command->Controller;
369   void *ControllerBaseAddress = Controller->BaseAddress;
370   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
371   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
372     Controller->V1.NextCommandMailbox;
373   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
374   DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
375   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
376       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
377     DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
378   Controller->V1.PreviousCommandMailbox2 =
379     Controller->V1.PreviousCommandMailbox1;
380   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
381   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
382     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
383   Controller->V1.NextCommandMailbox = NextCommandMailbox;
384 }
385
386
387 /*
388   DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
389   Controllers with Single Mode Firmware.
390 */
391
392 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
393 {
394   DAC960_Controller_T *Controller = Command->Controller;
395   void *ControllerBaseAddress = Controller->BaseAddress;
396   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
397   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
398     Controller->V1.NextCommandMailbox;
399   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
400   DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
401   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
402       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
403     DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
404   Controller->V1.PreviousCommandMailbox2 =
405     Controller->V1.PreviousCommandMailbox1;
406   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
407   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
408     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
409   Controller->V1.NextCommandMailbox = NextCommandMailbox;
410 }
411
412
413 /*
414   DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
415   Controllers with Dual Mode Firmware.
416 */
417
418 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
419 {
420   DAC960_Controller_T *Controller = Command->Controller;
421   void *ControllerBaseAddress = Controller->BaseAddress;
422   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
423   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
424     Controller->V1.NextCommandMailbox;
425   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
426   DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
427   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
428       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
429     DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
430   Controller->V1.PreviousCommandMailbox2 =
431     Controller->V1.PreviousCommandMailbox1;
432   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
433   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
434     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
435   Controller->V1.NextCommandMailbox = NextCommandMailbox;
436 }
437
438
439 /*
440   DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
441   Controllers with Single Mode Firmware.
442 */
443
444 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
445 {
446   DAC960_Controller_T *Controller = Command->Controller;
447   void *ControllerBaseAddress = Controller->BaseAddress;
448   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
449   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
450     Controller->V1.NextCommandMailbox;
451   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
452   DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
453   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
454       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
455     DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
456   Controller->V1.PreviousCommandMailbox2 =
457     Controller->V1.PreviousCommandMailbox1;
458   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
459   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
460     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
461   Controller->V1.NextCommandMailbox = NextCommandMailbox;
462 }
463
464
465 /*
466   DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
467 */
468
469 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
470 {
471   DAC960_Controller_T *Controller = Command->Controller;
472   void *ControllerBaseAddress = Controller->BaseAddress;
473   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
474   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
475   while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
476     udelay(1);
477   DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
478   DAC960_PD_NewCommand(ControllerBaseAddress);
479 }
480
481
482 /*
483   DAC960_ExecuteCommand executes Command and waits for completion.
484 */
485
486 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
487 {
488   DAC960_Controller_T *Controller = Command->Controller;
489   DECLARE_COMPLETION(Completion);
490   unsigned long ProcessorFlags;
491   Command->Completion = &Completion;
492   DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
493   DAC960_QueueCommand(Command);
494   DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
495   if (in_interrupt()) return;
496   wait_for_completion(&Completion);
497 }
498
499
500 /*
501   DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
502   Command and waits for completion.  It returns true on success and false
503   on failure.
504 */
505
506 static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
507                                       DAC960_V1_CommandOpcode_T CommandOpcode,
508                                       void *DataPointer)
509 {
510   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
511   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
512   DAC960_V1_CommandStatus_T CommandStatus;
513   DAC960_V1_ClearCommand(Command);
514   Command->CommandType = DAC960_ImmediateCommand;
515   CommandMailbox->Type3.CommandOpcode = CommandOpcode;
516   CommandMailbox->Type3.BusAddress = Virtual_to_Bus32(DataPointer);
517   DAC960_ExecuteCommand(Command);
518   CommandStatus = Command->V1.CommandStatus;
519   DAC960_DeallocateCommand(Command);
520   return (CommandStatus == DAC960_V1_NormalCompletion);
521 }
522
523
524 /*
525   DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
526   Command and waits for completion.  It returns true on success and false
527   on failure.
528 */
529
530 static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
531                                        DAC960_V1_CommandOpcode_T CommandOpcode,
532                                        unsigned char Channel,
533                                        unsigned char TargetID,
534                                        void *DataPointer)
535 {
536   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
537   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
538   DAC960_V1_CommandStatus_T CommandStatus;
539   DAC960_V1_ClearCommand(Command);
540   Command->CommandType = DAC960_ImmediateCommand;
541   CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
542   CommandMailbox->Type3D.Channel = Channel;
543   CommandMailbox->Type3D.TargetID = TargetID;
544   CommandMailbox->Type3D.BusAddress = Virtual_to_Bus32(DataPointer);
545   DAC960_ExecuteCommand(Command);
546   CommandStatus = Command->V1.CommandStatus;
547   DAC960_DeallocateCommand(Command);
548   return (CommandStatus == DAC960_V1_NormalCompletion);
549 }
550
551
552 /*
553   DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
554   Reading IOCTL Command and waits for completion.  It returns true on success
555   and false on failure.
556 */
557
558 static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller,
559                                      DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
560                                      void *DataPointer,
561                                      unsigned int DataByteCount)
562 {
563   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
564   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
565   DAC960_V2_CommandStatus_T CommandStatus;
566   DAC960_V2_ClearCommand(Command);
567   Command->CommandType = DAC960_ImmediateCommand;
568   CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
569   CommandMailbox->Common.CommandControlBits
570                         .DataTransferControllerToHost = true;
571   CommandMailbox->Common.CommandControlBits
572                         .NoAutoRequestSense = true;
573   CommandMailbox->Common.DataTransferSize = DataByteCount;
574   CommandMailbox->Common.IOCTL_Opcode = IOCTL_Opcode;
575   CommandMailbox->Common.DataTransferMemoryAddress
576                         .ScatterGatherSegments[0]
577                         .SegmentDataPointer =
578     Virtual_to_Bus64(DataPointer);
579   CommandMailbox->Common.DataTransferMemoryAddress
580                         .ScatterGatherSegments[0]
581                         .SegmentByteCount =
582     CommandMailbox->Common.DataTransferSize;
583   DAC960_ExecuteCommand(Command);
584   CommandStatus = Command->V2.CommandStatus;
585   DAC960_DeallocateCommand(Command);
586   return (CommandStatus == DAC960_V2_NormalCompletion);
587 }
588
589
590 /*
591   DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
592   Information Reading IOCTL Command and waits for completion.  It returns
593   true on success and false on failure.
594 */
595
596 static boolean DAC960_V2_ControllerInfo(DAC960_Controller_T *Controller,
597                                         DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
598                                         void *DataPointer,
599                                         unsigned int DataByteCount)
600 {
601   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
602   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
603   DAC960_V2_CommandStatus_T CommandStatus;
604   DAC960_V2_ClearCommand(Command);
605   Command->CommandType = DAC960_ImmediateCommand;
606   CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
607   CommandMailbox->ControllerInfo.CommandControlBits
608                                 .DataTransferControllerToHost = true;
609   CommandMailbox->ControllerInfo.CommandControlBits
610                                 .NoAutoRequestSense = true;
611   CommandMailbox->ControllerInfo.DataTransferSize = DataByteCount;
612   CommandMailbox->ControllerInfo.ControllerNumber = 0;
613   CommandMailbox->ControllerInfo.IOCTL_Opcode = IOCTL_Opcode;
614   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
615                                 .ScatterGatherSegments[0]
616                                 .SegmentDataPointer =
617     Virtual_to_Bus64(DataPointer);
618   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
619                                 .ScatterGatherSegments[0]
620                                 .SegmentByteCount =
621     CommandMailbox->ControllerInfo.DataTransferSize;
622   DAC960_ExecuteCommand(Command);
623   CommandStatus = Command->V2.CommandStatus;
624   DAC960_DeallocateCommand(Command);
625   return (CommandStatus == DAC960_V2_NormalCompletion);
626 }
627
628
629 /*
630   DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
631   Device Information Reading IOCTL Command and waits for completion.  It
632   returns true on success and false on failure.
633 */
634
635 static boolean DAC960_V2_LogicalDeviceInfo(DAC960_Controller_T *Controller,
636                                            DAC960_V2_IOCTL_Opcode_T
637                                              IOCTL_Opcode,
638                                            unsigned short
639                                              LogicalDeviceNumber,
640                                            void *DataPointer,
641                                            unsigned int DataByteCount)
642 {
643   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
644   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
645   DAC960_V2_CommandStatus_T CommandStatus;
646   DAC960_V2_ClearCommand(Command);
647   Command->CommandType = DAC960_ImmediateCommand;
648   CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
649   CommandMailbox->LogicalDeviceInfo.CommandControlBits
650                                    .DataTransferControllerToHost = true;
651   CommandMailbox->LogicalDeviceInfo.CommandControlBits
652                                    .NoAutoRequestSense = true;
653   CommandMailbox->LogicalDeviceInfo.DataTransferSize = DataByteCount;
654   CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
655     LogicalDeviceNumber;
656   CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = IOCTL_Opcode;
657   CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
658                                    .ScatterGatherSegments[0]
659                                    .SegmentDataPointer =
660     Virtual_to_Bus64(DataPointer);
661   CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
662                                    .ScatterGatherSegments[0]
663                                    .SegmentByteCount =
664     CommandMailbox->LogicalDeviceInfo.DataTransferSize;
665   DAC960_ExecuteCommand(Command);
666   CommandStatus = Command->V2.CommandStatus;
667   DAC960_DeallocateCommand(Command);
668   return (CommandStatus == DAC960_V2_NormalCompletion);
669 }
670
671
672 /*
673   DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller Physical
674   Device Information Reading IOCTL Command and waits for completion.  It
675   returns true on success and false on failure.
676 */
677
678 static boolean DAC960_V2_PhysicalDeviceInfo(DAC960_Controller_T *Controller,
679                                             DAC960_V2_IOCTL_Opcode_T
680                                               IOCTL_Opcode,
681                                             unsigned char Channel,
682                                             unsigned char TargetID,
683                                             unsigned char LogicalUnit,
684                                             void *DataPointer,
685                                             unsigned int DataByteCount)
686 {
687   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
688   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
689   DAC960_V2_CommandStatus_T CommandStatus;
690   DAC960_V2_ClearCommand(Command);
691   Command->CommandType = DAC960_ImmediateCommand;
692   CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
693   CommandMailbox->PhysicalDeviceInfo.CommandControlBits
694                                     .DataTransferControllerToHost = true;
695   CommandMailbox->PhysicalDeviceInfo.CommandControlBits
696                                     .NoAutoRequestSense = true;
697   CommandMailbox->PhysicalDeviceInfo.DataTransferSize = DataByteCount;
698   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
699   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
700   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
701   CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = IOCTL_Opcode;
702   CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
703                                     .ScatterGatherSegments[0]
704                                     .SegmentDataPointer =
705     Virtual_to_Bus64(DataPointer);
706   CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
707                                     .ScatterGatherSegments[0]
708                                     .SegmentByteCount =
709     CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
710   DAC960_ExecuteCommand(Command);
711   CommandStatus = Command->V2.CommandStatus;
712   DAC960_DeallocateCommand(Command);
713   return (CommandStatus == DAC960_V2_NormalCompletion);
714 }
715
716
717 /*
718   DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
719   Operation IOCTL Command and waits for completion.  It returns true on
720   success and false on failure.
721 */
722
723 static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
724                                          DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
725                                          DAC960_V2_OperationDevice_T
726                                            OperationDevice)
727 {
728   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
729   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
730   DAC960_V2_CommandStatus_T CommandStatus;
731   DAC960_V2_ClearCommand(Command);
732   Command->CommandType = DAC960_ImmediateCommand;
733   CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
734   CommandMailbox->DeviceOperation.CommandControlBits
735                                  .DataTransferControllerToHost = true;
736   CommandMailbox->DeviceOperation.CommandControlBits
737                                  .NoAutoRequestSense = true;
738   CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
739   CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
740   DAC960_ExecuteCommand(Command);
741   CommandStatus = Command->V2.CommandStatus;
742   DAC960_DeallocateCommand(Command);
743   return (CommandStatus == DAC960_V2_NormalCompletion);
744 }
745
746
747 /*
748   DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
749   for DAC960 V1 Firmware Controllers.
750 */
751
752 static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
753                                                       *Controller)
754 {
755   void *ControllerBaseAddress = Controller->BaseAddress;
756   DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
757   DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
758   DAC960_V1_CommandMailbox_T CommandMailbox;
759   DAC960_V1_CommandStatus_T CommandStatus;
760   unsigned long MemoryMailboxPagesAddress;
761   unsigned long MemoryMailboxPagesOrder;
762   unsigned long MemoryMailboxPagesSize;
763   void *SavedMemoryMailboxesAddress = NULL;
764   short NextCommandMailboxIndex = 0;
765   short NextStatusMailboxIndex = 0;
766   int TimeoutCounter = 1000000, i;
767   MemoryMailboxPagesOrder = 0;
768   MemoryMailboxPagesSize =
769     DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T) +
770     DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
771   while (MemoryMailboxPagesSize > PAGE_SIZE << MemoryMailboxPagesOrder)
772     MemoryMailboxPagesOrder++;
773   if (Controller->HardwareType == DAC960_LA_Controller)
774     DAC960_LA_RestoreMemoryMailboxInfo(Controller,
775                                        &SavedMemoryMailboxesAddress,
776                                        &NextCommandMailboxIndex,
777                                        &NextStatusMailboxIndex);
778   else DAC960_PG_RestoreMemoryMailboxInfo(Controller,
779                                           &SavedMemoryMailboxesAddress,
780                                           &NextCommandMailboxIndex,
781                                           &NextStatusMailboxIndex);
782   if (SavedMemoryMailboxesAddress == NULL)
783     {
784       MemoryMailboxPagesAddress =
785         __get_free_pages(GFP_KERNEL, MemoryMailboxPagesOrder);
786       Controller->MemoryMailboxPagesAddress = MemoryMailboxPagesAddress;
787       CommandMailboxesMemory =
788         (DAC960_V1_CommandMailbox_T *) MemoryMailboxPagesAddress;
789     }
790   else CommandMailboxesMemory = SavedMemoryMailboxesAddress;
791   if (CommandMailboxesMemory == NULL) return false;
792   Controller->MemoryMailboxPagesOrder = MemoryMailboxPagesOrder;
793   memset(CommandMailboxesMemory, 0, MemoryMailboxPagesSize);
794   Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
795   CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
796   Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
797   Controller->V1.NextCommandMailbox =
798     &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
799   if (--NextCommandMailboxIndex < 0)
800     NextCommandMailboxIndex = DAC960_V1_CommandMailboxCount - 1;
801   Controller->V1.PreviousCommandMailbox1 =
802     &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
803   if (--NextCommandMailboxIndex < 0)
804     NextCommandMailboxIndex = DAC960_V1_CommandMailboxCount - 1;
805   Controller->V1.PreviousCommandMailbox2 =
806     &Controller->V1.FirstCommandMailbox[NextCommandMailboxIndex];
807   StatusMailboxesMemory =
808     (DAC960_V1_StatusMailbox_T *) (CommandMailboxesMemory + 1);
809   Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
810   StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
811   Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
812   Controller->V1.NextStatusMailbox =
813     &Controller->V1.FirstStatusMailbox[NextStatusMailboxIndex];
814   if (SavedMemoryMailboxesAddress != NULL) return true;
815   /* Enable the Memory Mailbox Interface. */
816   Controller->V1.DualModeMemoryMailboxInterface = true;
817   CommandMailbox.TypeX.CommandOpcode = 0x2B;
818   CommandMailbox.TypeX.CommandIdentifier = 0;
819   CommandMailbox.TypeX.CommandOpcode2 = 0x14;
820   CommandMailbox.TypeX.CommandMailboxesBusAddress =
821     Virtual_to_Bus32(Controller->V1.FirstCommandMailbox);
822   CommandMailbox.TypeX.StatusMailboxesBusAddress =
823     Virtual_to_Bus32(Controller->V1.FirstStatusMailbox);
824   for (i = 0; i < 2; i++)
825     switch (Controller->HardwareType)
826       {
827       case DAC960_LA_Controller:
828         while (--TimeoutCounter >= 0)
829           {
830             if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
831               break;
832             udelay(10);
833           }
834         if (TimeoutCounter < 0) return false;
835         DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
836         DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
837         while (--TimeoutCounter >= 0)
838           {
839             if (DAC960_LA_HardwareMailboxStatusAvailableP(
840                   ControllerBaseAddress))
841               break;
842             udelay(10);
843           }
844         if (TimeoutCounter < 0) return false;
845         CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
846         DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
847         DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
848         if (CommandStatus == DAC960_V1_NormalCompletion) return true;
849         Controller->V1.DualModeMemoryMailboxInterface = false;
850         CommandMailbox.TypeX.CommandOpcode2 = 0x10;
851         break;
852       case DAC960_PG_Controller:
853         while (--TimeoutCounter >= 0)
854           {
855             if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
856               break;
857             udelay(10);
858           }
859         if (TimeoutCounter < 0) return false;
860         DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
861         DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
862         while (--TimeoutCounter >= 0)
863           {
864             if (DAC960_PG_HardwareMailboxStatusAvailableP(
865                   ControllerBaseAddress))
866               break;
867             udelay(10);
868           }
869         if (TimeoutCounter < 0) return false;
870         CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
871         DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
872         DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
873         if (CommandStatus == DAC960_V1_NormalCompletion) return true;
874         Controller->V1.DualModeMemoryMailboxInterface = false;
875         CommandMailbox.TypeX.CommandOpcode2 = 0x10;
876         break;
877       default:
878         break;
879       }
880   return false;
881 }
882
883
884 /*
885   DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
886   for DAC960 V2 Firmware Controllers.
887 */
888
889 static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
890                                                       *Controller)
891 {
892   void *ControllerBaseAddress = Controller->BaseAddress;
893   DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
894   DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
895   DAC960_V2_CommandMailbox_T CommandMailbox;
896   DAC960_V2_CommandStatus_T CommandStatus = 0;
897   unsigned long MemoryMailboxPagesAddress;
898   unsigned long MemoryMailboxPagesOrder;
899   unsigned long MemoryMailboxPagesSize;
900   MemoryMailboxPagesOrder = 0;
901   MemoryMailboxPagesSize =
902     DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T) +
903     DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T) +
904     sizeof(DAC960_V2_HealthStatusBuffer_T);
905   while (MemoryMailboxPagesSize > PAGE_SIZE << MemoryMailboxPagesOrder)
906     MemoryMailboxPagesOrder++;
907   MemoryMailboxPagesAddress =
908     __get_free_pages(GFP_KERNEL, MemoryMailboxPagesOrder);
909   Controller->MemoryMailboxPagesAddress = MemoryMailboxPagesAddress;
910   CommandMailboxesMemory =
911     (DAC960_V2_CommandMailbox_T *) MemoryMailboxPagesAddress;
912   if (CommandMailboxesMemory == NULL) return false;
913   Controller->MemoryMailboxPagesOrder = MemoryMailboxPagesOrder;
914   memset(CommandMailboxesMemory, 0, MemoryMailboxPagesSize);
915   Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
916   CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
917   Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
918   Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
919   Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
920   Controller->V2.PreviousCommandMailbox2 =
921     Controller->V2.LastCommandMailbox - 1;
922   StatusMailboxesMemory =
923     (DAC960_V2_StatusMailbox_T *) (CommandMailboxesMemory + 1);
924   Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
925   StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
926   Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
927   Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
928   Controller->V2.HealthStatusBuffer =
929     (DAC960_V2_HealthStatusBuffer_T *) (StatusMailboxesMemory + 1);
930   /* Enable the Memory Mailbox Interface. */
931   memset(&CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
932   CommandMailbox.SetMemoryMailbox.CommandIdentifier = 1;
933   CommandMailbox.SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
934   CommandMailbox.SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
935   CommandMailbox.SetMemoryMailbox.FirstCommandMailboxSizeKB =
936     (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
937   CommandMailbox.SetMemoryMailbox.FirstStatusMailboxSizeKB =
938     (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
939   CommandMailbox.SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
940   CommandMailbox.SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
941   CommandMailbox.SetMemoryMailbox.RequestSenseSize = 0;
942   CommandMailbox.SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
943   CommandMailbox.SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
944   CommandMailbox.SetMemoryMailbox.HealthStatusBufferBusAddress =
945     Virtual_to_Bus64(Controller->V2.HealthStatusBuffer);
946   CommandMailbox.SetMemoryMailbox.FirstCommandMailboxBusAddress =
947     Virtual_to_Bus64(Controller->V2.FirstCommandMailbox);
948   CommandMailbox.SetMemoryMailbox.FirstStatusMailboxBusAddress =
949     Virtual_to_Bus64(Controller->V2.FirstStatusMailbox);
950   switch (Controller->HardwareType)
951     {
952     case DAC960_BA_Controller:
953       while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
954         udelay(1);
955       DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
956       DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
957       while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
958         udelay(1);
959       CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
960       DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
961       DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
962       break;
963     case DAC960_LP_Controller:
964       while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
965         udelay(1);
966       DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
967       DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
968       while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
969         udelay(1);
970       CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
971       DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
972       DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
973       break;
974     default:
975       break;
976     }
977   return (CommandStatus == DAC960_V2_NormalCompletion);
978 }
979
980
981 /*
982   DAC960_V1_ReadControllerConfiguration reads the Configuration Information
983   from DAC960 V1 Firmware Controllers and initializes the Controller structure.
984 */
985
986 static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
987                                                      *Controller)
988 {
989   DAC960_V1_Enquiry2_T Enquiry2;
990   DAC960_V1_Config2_T Config2;
991   int LogicalDriveNumber, Channel, TargetID;
992   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
993                               &Controller->V1.Enquiry))
994     return DAC960_Failure(Controller, "ENQUIRY");
995   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, &Enquiry2))
996     return DAC960_Failure(Controller, "ENQUIRY2");
997   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, &Config2))
998     return DAC960_Failure(Controller, "READ CONFIG2");
999   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1000                               &Controller->V1.LogicalDriveInformation))
1001     return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1002   for (Channel = 0; Channel < Enquiry2.ActualChannels; Channel++)
1003     for (TargetID = 0; TargetID < Enquiry2.MaxTargets; TargetID++)
1004       if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1005                                    Channel, TargetID,
1006                                    &Controller->V1.DeviceState
1007                                                    [Channel][TargetID]))
1008         return DAC960_Failure(Controller, "GET DEVICE STATE");
1009   /*
1010     Initialize the Controller Model Name and Full Model Name fields.
1011   */
1012   switch (Enquiry2.HardwareID.SubModel)
1013     {
1014     case DAC960_V1_P_PD_PU:
1015       if (Enquiry2.SCSICapability.BusSpeed == DAC960_V1_Ultra)
1016         strcpy(Controller->ModelName, "DAC960PU");
1017       else strcpy(Controller->ModelName, "DAC960PD");
1018       break;
1019     case DAC960_V1_PL:
1020       strcpy(Controller->ModelName, "DAC960PL");
1021       break;
1022     case DAC960_V1_PG:
1023       strcpy(Controller->ModelName, "DAC960PG");
1024       break;
1025     case DAC960_V1_PJ:
1026       strcpy(Controller->ModelName, "DAC960PJ");
1027       break;
1028     case DAC960_V1_PR:
1029       strcpy(Controller->ModelName, "DAC960PR");
1030       break;
1031     case DAC960_V1_PT:
1032       strcpy(Controller->ModelName, "DAC960PT");
1033       break;
1034     case DAC960_V1_PTL0:
1035       strcpy(Controller->ModelName, "DAC960PTL0");
1036       break;
1037     case DAC960_V1_PRL:
1038       strcpy(Controller->ModelName, "DAC960PRL");
1039       break;
1040     case DAC960_V1_PTL1:
1041       strcpy(Controller->ModelName, "DAC960PTL1");
1042       break;
1043     case DAC960_V1_1164P:
1044       strcpy(Controller->ModelName, "DAC1164P");
1045       break;
1046     default:
1047       return DAC960_Failure(Controller, "MODEL VERIFICATION");
1048     }
1049   strcpy(Controller->FullModelName, "Mylex ");
1050   strcat(Controller->FullModelName, Controller->ModelName);
1051   /*
1052     Initialize the Controller Firmware Version field and verify that it
1053     is a supported firmware version.  The supported firmware versions are:
1054
1055     DAC1164P                5.06 and above
1056     DAC960PTL/PRL/PJ/PG     4.06 and above
1057     DAC960PU/PD/PL          3.51 and above
1058   */
1059   sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1060           Enquiry2.FirmwareID.MajorVersion, Enquiry2.FirmwareID.MinorVersion,
1061           Enquiry2.FirmwareID.FirmwareType, Enquiry2.FirmwareID.TurnID);
1062   if (!((Controller->FirmwareVersion[0] == '5' &&
1063          strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1064         (Controller->FirmwareVersion[0] == '4' &&
1065          strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1066         (Controller->FirmwareVersion[0] == '3' &&
1067          strcmp(Controller->FirmwareVersion, "3.51") >= 0)))
1068     {
1069       DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1070       DAC960_Error("Firmware Version = '%s'\n", Controller,
1071                    Controller->FirmwareVersion);
1072       return false;
1073     }
1074   /*
1075     Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1076     Enclosure Management Enabled fields.
1077   */
1078   Controller->Channels = Enquiry2.ActualChannels;
1079   Controller->Targets = Enquiry2.MaxTargets;
1080   Controller->MemorySize = Enquiry2.MemorySize >> 20;
1081   Controller->V1.SAFTE_EnclosureManagementEnabled =
1082     (Enquiry2.FaultManagementType == DAC960_V1_SAFTE);
1083   /*
1084     Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1085     Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1086     Driver Scatter/Gather Limit.  The Driver Queue Depth must be at most one
1087     less than the Controller Queue Depth to allow for an automatic drive
1088     rebuild operation.
1089   */
1090   Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1091   Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1092   if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1093     Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1094   Controller->LogicalDriveCount =
1095     Controller->V1.Enquiry.NumberOfLogicalDrives;
1096   Controller->MaxBlocksPerCommand = Enquiry2.MaxBlocksPerCommand;
1097   Controller->ControllerScatterGatherLimit = Enquiry2.MaxScatterGatherEntries;
1098   Controller->DriverScatterGatherLimit =
1099     Controller->ControllerScatterGatherLimit;
1100   if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1101     Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1102   /*
1103     Initialize the Stripe Size, Segment Size, and Geometry Translation.
1104   */
1105   Controller->V1.StripeSize = Config2.BlocksPerStripe * Config2.BlockFactor
1106                               >> (10 - DAC960_BlockSizeBits);
1107   Controller->V1.SegmentSize = Config2.BlocksPerCacheLine * Config2.BlockFactor
1108                                >> (10 - DAC960_BlockSizeBits);
1109   switch (Config2.DriveGeometry)
1110     {
1111     case DAC960_V1_Geometry_128_32:
1112       Controller->V1.GeometryTranslationHeads = 128;
1113       Controller->V1.GeometryTranslationSectors = 32;
1114       break;
1115     case DAC960_V1_Geometry_255_63:
1116       Controller->V1.GeometryTranslationHeads = 255;
1117       Controller->V1.GeometryTranslationSectors = 63;
1118       break;
1119     default:
1120       return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1121     }
1122   /*
1123     Initialize the Logical Drive Initially Accessible flag.
1124   */
1125   for (LogicalDriveNumber = 0;
1126        LogicalDriveNumber < Controller->LogicalDriveCount;
1127        LogicalDriveNumber++)
1128     if (Controller->V1.LogicalDriveInformation
1129                        [LogicalDriveNumber].LogicalDriveState !=
1130         DAC960_V1_LogicalDrive_Offline)
1131       Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1132   Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1133   return true;
1134 }
1135
1136
1137 /*
1138   DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1139   from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1140 */
1141
1142 static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1143                                                      *Controller)
1144 {
1145   DAC960_V2_ControllerInfo_T *ControllerInfo =
1146     &Controller->V2.ControllerInformation;
1147   unsigned short LogicalDeviceNumber = 0;
1148   int ModelNameLength;
1149   if (!DAC960_V2_ControllerInfo(Controller, DAC960_V2_GetControllerInfo,
1150                                 ControllerInfo,
1151                                 sizeof(DAC960_V2_ControllerInfo_T)))
1152     return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1153   if (!DAC960_V2_GeneralInfo(Controller, DAC960_V2_GetHealthStatus,
1154                              Controller->V2.HealthStatusBuffer,
1155                              sizeof(DAC960_V2_HealthStatusBuffer_T)))
1156     return DAC960_Failure(Controller, "GET HEALTH STATUS");
1157   /*
1158     Initialize the Controller Model Name and Full Model Name fields.
1159   */
1160   ModelNameLength = sizeof(ControllerInfo->ControllerName);
1161   if (ModelNameLength > sizeof(Controller->ModelName)-1)
1162     ModelNameLength = sizeof(Controller->ModelName)-1;
1163   memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1164          ModelNameLength);
1165   ModelNameLength--;
1166   while (Controller->ModelName[ModelNameLength] == ' ' ||
1167          Controller->ModelName[ModelNameLength] == '\0')
1168     ModelNameLength--;
1169   Controller->ModelName[++ModelNameLength] = '\0';
1170   strcpy(Controller->FullModelName, "Mylex ");
1171   strcat(Controller->FullModelName, Controller->ModelName);
1172   /*
1173     Initialize the Controller Firmware Version field.
1174   */
1175   sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1176           ControllerInfo->FirmwareMajorVersion,
1177           ControllerInfo->FirmwareMinorVersion,
1178           ControllerInfo->FirmwareTurnNumber);
1179   if (ControllerInfo->FirmwareMajorVersion == 6 &&
1180       ControllerInfo->FirmwareMinorVersion == 0 &&
1181       ControllerInfo->FirmwareTurnNumber < 1)
1182     {
1183       DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1184                   Controller, Controller->FirmwareVersion);
1185       DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1186                   Controller);
1187       DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1188                   Controller);
1189     }
1190   /*
1191     Initialize the Controller Channels, Targets, and Memory Size.
1192   */
1193   Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1194   Controller->Targets =
1195     ControllerInfo->MaximumTargetsPerChannel
1196                     [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1197   Controller->MemorySize = ControllerInfo->MemorySizeMB;
1198   /*
1199     Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1200     Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1201     Driver Scatter/Gather Limit.  The Driver Queue Depth must be at most one
1202     less than the Controller Queue Depth to allow for an automatic drive
1203     rebuild operation.
1204   */
1205   Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1206   Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1207   if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1208     Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1209   Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1210   Controller->MaxBlocksPerCommand =
1211     ControllerInfo->MaximumDataTransferSizeInBlocks;
1212   Controller->ControllerScatterGatherLimit =
1213     ControllerInfo->MaximumScatterGatherEntries;
1214   Controller->DriverScatterGatherLimit =
1215     Controller->ControllerScatterGatherLimit;
1216   if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1217     Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1218   /*
1219     Initialize the Logical Device Information.
1220   */
1221   while (true)
1222     {
1223       DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1224         &Controller->V2.NewLogicalDeviceInformation;
1225       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1226       DAC960_V2_PhysicalDevice_T PhysicalDevice;
1227       if (!DAC960_V2_LogicalDeviceInfo(Controller,
1228                                        DAC960_V2_GetLogicalDeviceInfoValid,
1229                                        LogicalDeviceNumber,
1230                                        NewLogicalDeviceInfo,
1231                                        sizeof(DAC960_V2_LogicalDeviceInfo_T)))
1232         break;
1233       LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1234       if (LogicalDeviceNumber > DAC960_MaxLogicalDrives)
1235         panic("DAC960: Logical Drive Number %d not supported\n",
1236                        LogicalDeviceNumber);
1237       if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize)
1238         panic("DAC960: Logical Drive Block Size %d not supported\n",
1239               NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1240       PhysicalDevice.Controller = 0;
1241       PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1242       PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1243       PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1244       Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1245         PhysicalDevice;
1246       if (NewLogicalDeviceInfo->LogicalDeviceState !=
1247           DAC960_V2_LogicalDevice_Offline)
1248         Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1249       LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *)
1250         kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC);
1251       if (LogicalDeviceInfo == NULL)
1252         return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1253       Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1254         LogicalDeviceInfo;
1255       memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1256              sizeof(DAC960_V2_LogicalDeviceInfo_T));
1257       LogicalDeviceNumber++;
1258     }
1259   return true;
1260 }
1261
1262
1263 /*
1264   DAC960_ReportControllerConfiguration reports the Configuration Information
1265   for Controller.
1266 */
1267
1268 static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T
1269                                                     *Controller)
1270 {
1271   DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1272               Controller, Controller->ModelName);
1273   DAC960_Info("  Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1274               Controller, Controller->FirmwareVersion,
1275               Controller->Channels, Controller->MemorySize);
1276   DAC960_Info("  PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1277               Controller, Controller->Bus,
1278               Controller->Device, Controller->Function);
1279   if (Controller->IO_Address == 0)
1280     DAC960_Info("Unassigned\n", Controller);
1281   else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1282   DAC960_Info("  PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1283               Controller, Controller->PCI_Address,
1284               (unsigned long) Controller->BaseAddress,
1285               Controller->IRQ_Channel);
1286   DAC960_Info("  Controller Queue Depth: %d, "
1287               "Maximum Blocks per Command: %d\n",
1288               Controller, Controller->ControllerQueueDepth,
1289               Controller->MaxBlocksPerCommand);
1290   DAC960_Info("  Driver Queue Depth: %d, "
1291               "Scatter/Gather Limit: %d of %d Segments\n",
1292               Controller, Controller->DriverQueueDepth,
1293               Controller->DriverScatterGatherLimit,
1294               Controller->ControllerScatterGatherLimit);
1295   if (Controller->FirmwareType == DAC960_V1_Controller)
1296     {
1297       DAC960_Info("  Stripe Size: %dKB, Segment Size: %dKB, "
1298                   "BIOS Geometry: %d/%d\n", Controller,
1299                   Controller->V1.StripeSize,
1300                   Controller->V1.SegmentSize,
1301                   Controller->V1.GeometryTranslationHeads,
1302                   Controller->V1.GeometryTranslationSectors);
1303       if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1304         DAC960_Info("  SAF-TE Enclosure Management Enabled\n", Controller);
1305     }
1306   return true;
1307 }
1308
1309
1310 /*
1311   DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1312   for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1313   Inquiry Unit Serial Number information for each device connected to
1314   Controller.
1315 */
1316
1317 static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1318                                                  *Controller)
1319 {
1320   DAC960_V1_DCDB_T DCDBs[DAC960_V1_MaxChannels], *DCDB;
1321   Completion_T Completions[DAC960_V1_MaxChannels], *Completion;
1322   unsigned long ProcessorFlags;
1323   int Channel, TargetID;
1324   for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1325     {
1326       for (Channel = 0; Channel < Controller->Channels; Channel++)
1327         {
1328           DAC960_Command_T *Command = Controller->Commands[Channel];
1329           DAC960_SCSI_Inquiry_T *InquiryStandardData =
1330             &Controller->V1.InquiryStandardData[Channel][TargetID];
1331           InquiryStandardData->PeripheralDeviceType = 0x1F;
1332           Completion = &Completions[Channel];
1333           init_completion(Completion);
1334           DCDB = &DCDBs[Channel];
1335           DAC960_V1_ClearCommand(Command);
1336           Command->CommandType = DAC960_ImmediateCommand;
1337           Command->Completion = Completion;
1338           Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
1339           Command->V1.CommandMailbox.Type3.BusAddress = Virtual_to_Bus32(DCDB);
1340           DCDB->Channel = Channel;
1341           DCDB->TargetID = TargetID;
1342           DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
1343           DCDB->EarlyStatus = false;
1344           DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
1345           DCDB->NoAutomaticRequestSense = false;
1346           DCDB->DisconnectPermitted = true;
1347           DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
1348           DCDB->BusAddress = Virtual_to_Bus32(InquiryStandardData);
1349           DCDB->CDBLength = 6;
1350           DCDB->TransferLengthHigh4 = 0;
1351           DCDB->SenseLength = sizeof(DCDB->SenseData);
1352           DCDB->CDB[0] = 0x12; /* INQUIRY */
1353           DCDB->CDB[1] = 0; /* EVPD = 0 */
1354           DCDB->CDB[2] = 0; /* Page Code */
1355           DCDB->CDB[3] = 0; /* Reserved */
1356           DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
1357           DCDB->CDB[5] = 0; /* Control */
1358           DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
1359           DAC960_QueueCommand(Command);
1360           DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
1361         }
1362       for (Channel = 0; Channel < Controller->Channels; Channel++)
1363         {
1364           DAC960_Command_T *Command = Controller->Commands[Channel];
1365           DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1366             &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
1367           InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
1368           Completion = &Completions[Channel];
1369           wait_for_completion(Completion);
1370           if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion)
1371             continue;
1372           Command->Completion = Completion;
1373           DCDB = &DCDBs[Channel];
1374           DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1375           DCDB->BusAddress = Virtual_to_Bus32(InquiryUnitSerialNumber);
1376           DCDB->SenseLength = sizeof(DCDB->SenseData);
1377           DCDB->CDB[0] = 0x12; /* INQUIRY */
1378           DCDB->CDB[1] = 1; /* EVPD = 1 */
1379           DCDB->CDB[2] = 0x80; /* Page Code */
1380           DCDB->CDB[3] = 0; /* Reserved */
1381           DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1382           DCDB->CDB[5] = 0; /* Control */
1383           DAC960_AcquireControllerLock(Controller, &ProcessorFlags);
1384           DAC960_QueueCommand(Command);
1385           DAC960_ReleaseControllerLock(Controller, &ProcessorFlags);
1386           wait_for_completion(Completion);
1387         }
1388     }
1389   return true;
1390 }
1391
1392
1393 /*
1394   DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
1395   for DAC960 V2 Firmware Controllers by requesting the Physical Device
1396   Information and SCSI Inquiry Unit Serial Number information for each
1397   device connected to Controller.
1398 */
1399
1400 static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1401                                                  *Controller)
1402 {
1403   unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
1404   unsigned short PhysicalDeviceIndex = 0;
1405   while (true)
1406     {
1407       DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
1408         &Controller->V2.NewPhysicalDeviceInformation;
1409       DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
1410       DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
1411       DAC960_Command_T *Command;
1412       DAC960_V2_CommandMailbox_T *CommandMailbox;
1413       if (!DAC960_V2_PhysicalDeviceInfo(Controller,
1414                                         DAC960_V2_GetPhysicalDeviceInfoValid,
1415                                         Channel,
1416                                         TargetID,
1417                                         LogicalUnit,
1418                                         NewPhysicalDeviceInfo,
1419                                         sizeof(DAC960_V2_PhysicalDeviceInfo_T)))
1420           break;
1421       Channel = NewPhysicalDeviceInfo->Channel;
1422       TargetID = NewPhysicalDeviceInfo->TargetID;
1423       LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
1424       PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *)
1425         kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
1426       if (PhysicalDeviceInfo == NULL)
1427         return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
1428       Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
1429         PhysicalDeviceInfo;
1430       memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
1431              sizeof(DAC960_V2_PhysicalDeviceInfo_T));
1432       InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *)
1433         kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1434       if (InquiryUnitSerialNumber == NULL)
1435         return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
1436       Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
1437         InquiryUnitSerialNumber;
1438       memset(InquiryUnitSerialNumber, 0,
1439              sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
1440       InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
1441       Command = DAC960_AllocateCommand(Controller);
1442       CommandMailbox = &Command->V2.CommandMailbox;
1443       DAC960_V2_ClearCommand(Command);
1444       Command->CommandType = DAC960_ImmediateCommand;
1445       CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1446       CommandMailbox->SCSI_10.CommandControlBits
1447                              .DataTransferControllerToHost = true;
1448       CommandMailbox->SCSI_10.CommandControlBits
1449                              .NoAutoRequestSense = true;
1450       CommandMailbox->SCSI_10.DataTransferSize =
1451         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1452       CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1453       CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1454       CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1455       CommandMailbox->SCSI_10.CDBLength = 6;
1456       CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1457       CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1458       CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1459       CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1460       CommandMailbox->SCSI_10.SCSI_CDB[4] =
1461         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1462       CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1463       CommandMailbox->SCSI_10.DataTransferMemoryAddress
1464                              .ScatterGatherSegments[0]
1465                              .SegmentDataPointer =
1466         Virtual_to_Bus64(InquiryUnitSerialNumber);
1467       CommandMailbox->SCSI_10.DataTransferMemoryAddress
1468                              .ScatterGatherSegments[0]
1469                              .SegmentByteCount =
1470         CommandMailbox->SCSI_10.DataTransferSize;
1471       DAC960_ExecuteCommand(Command);
1472       DAC960_DeallocateCommand(Command);
1473       PhysicalDeviceIndex++;
1474       LogicalUnit++;
1475     }
1476   return true;
1477 }
1478
1479
1480 /*
1481   DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
1482   Product Serial Number fields of the Inquiry Standard Data and Inquiry
1483   Unit Serial Number structures.
1484 */
1485
1486 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
1487                                          *InquiryStandardData,
1488                                        DAC960_SCSI_Inquiry_UnitSerialNumber_T
1489                                          *InquiryUnitSerialNumber,
1490                                        unsigned char *Vendor,
1491                                        unsigned char *Model,
1492                                        unsigned char *Revision,
1493                                        unsigned char *SerialNumber)
1494 {
1495   int SerialNumberLength, i;
1496   if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
1497   for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
1498     {
1499       unsigned char VendorCharacter =
1500         InquiryStandardData->VendorIdentification[i];
1501       Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
1502                    ? VendorCharacter : ' ');
1503     }
1504   Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
1505   for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
1506     {
1507       unsigned char ModelCharacter =
1508         InquiryStandardData->ProductIdentification[i];
1509       Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
1510                   ? ModelCharacter : ' ');
1511     }
1512   Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
1513   for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
1514     {
1515       unsigned char RevisionCharacter =
1516         InquiryStandardData->ProductRevisionLevel[i];
1517       Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
1518                      ? RevisionCharacter : ' ');
1519     }
1520   Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
1521   if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
1522   SerialNumberLength = InquiryUnitSerialNumber->PageLength;
1523   if (SerialNumberLength >
1524       sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
1525     SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
1526   for (i = 0; i < SerialNumberLength; i++)
1527     {
1528       unsigned char SerialNumberCharacter =
1529         InquiryUnitSerialNumber->ProductSerialNumber[i];
1530       SerialNumber[i] =
1531         (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
1532          ? SerialNumberCharacter : ' ');
1533     }
1534   SerialNumber[SerialNumberLength] = '\0';
1535 }
1536
1537
1538 /*
1539   DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
1540   Information for DAC960 V1 Firmware Controllers.
1541 */
1542
1543 static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1544                                                    *Controller)
1545 {
1546   int LogicalDriveNumber, Channel, TargetID;
1547   DAC960_Info("  Physical Devices:\n", Controller);
1548   for (Channel = 0; Channel < Controller->Channels; Channel++)
1549     for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1550       {
1551         DAC960_SCSI_Inquiry_T *InquiryStandardData =
1552           &Controller->V1.InquiryStandardData[Channel][TargetID];
1553         DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1554           &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
1555         DAC960_V1_DeviceState_T *DeviceState =
1556           &Controller->V1.DeviceState[Channel][TargetID];
1557         DAC960_V1_ErrorTableEntry_T *ErrorEntry =
1558           &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
1559         char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
1560         char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
1561         char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
1562         char SerialNumber[1+sizeof(InquiryUnitSerialNumber
1563                                    ->ProductSerialNumber)];
1564         if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
1565         DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
1566                                    Vendor, Model, Revision, SerialNumber);
1567         DAC960_Info("    %d:%d%s Vendor: %s  Model: %s  Revision: %s\n",
1568                     Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
1569                     Vendor, Model, Revision);
1570         if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
1571           DAC960_Info("         Serial Number: %s\n", Controller, SerialNumber);
1572         if (DeviceState->Present &&
1573             DeviceState->DeviceType == DAC960_V1_DiskType)
1574           {
1575             if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
1576               DAC960_Info("         Disk Status: %s, %d blocks, %d resets\n",
1577                           Controller,
1578                           (DeviceState->DeviceState == DAC960_V1_Device_Dead
1579                            ? "Dead"
1580                            : DeviceState->DeviceState
1581                              == DAC960_V1_Device_WriteOnly
1582                              ? "Write-Only"
1583                              : DeviceState->DeviceState
1584                                == DAC960_V1_Device_Online
1585                                ? "Online" : "Standby"),
1586                           DeviceState->DiskSize,
1587                           Controller->V1.DeviceResetCount[Channel][TargetID]);
1588             else
1589               DAC960_Info("         Disk Status: %s, %d blocks\n", Controller,
1590                           (DeviceState->DeviceState == DAC960_V1_Device_Dead
1591                            ? "Dead"
1592                            : DeviceState->DeviceState
1593                              == DAC960_V1_Device_WriteOnly
1594                              ? "Write-Only"
1595                              : DeviceState->DeviceState
1596                                == DAC960_V1_Device_Online
1597                                ? "Online" : "Standby"),
1598                           DeviceState->DiskSize);
1599           }
1600         if (ErrorEntry->ParityErrorCount > 0 ||
1601             ErrorEntry->SoftErrorCount > 0 ||
1602             ErrorEntry->HardErrorCount > 0 ||
1603             ErrorEntry->MiscErrorCount > 0)
1604           DAC960_Info("         Errors - Parity: %d, Soft: %d, "
1605                       "Hard: %d, Misc: %d\n", Controller,
1606                       ErrorEntry->ParityErrorCount,
1607                       ErrorEntry->SoftErrorCount,
1608                       ErrorEntry->HardErrorCount,
1609                       ErrorEntry->MiscErrorCount);
1610       }
1611   DAC960_Info("  Logical Drives:\n", Controller);
1612   for (LogicalDriveNumber = 0;
1613        LogicalDriveNumber < Controller->LogicalDriveCount;
1614        LogicalDriveNumber++)
1615     {
1616       DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
1617         &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
1618       DAC960_Info("    /dev/rd/c%dd%d: RAID-%d, %s, %d blocks, %s\n",
1619                   Controller, Controller->ControllerNumber, LogicalDriveNumber,
1620                   LogicalDriveInformation->RAIDLevel,
1621                   (LogicalDriveInformation->LogicalDriveState
1622                    == DAC960_V1_LogicalDrive_Online
1623                    ? "Online"
1624                    : LogicalDriveInformation->LogicalDriveState
1625                      == DAC960_V1_LogicalDrive_Critical
1626                      ? "Critical" : "Offline"),
1627                   LogicalDriveInformation->LogicalDriveSize,
1628                   (LogicalDriveInformation->WriteBack
1629                    ? "Write Back" : "Write Thru"));
1630     }
1631   return true;
1632 }
1633
1634
1635 /*
1636   DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
1637   Information for DAC960 V2 Firmware Controllers.
1638 */
1639
1640 static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1641                                                    *Controller)
1642 {
1643   int PhysicalDeviceIndex, LogicalDriveNumber;
1644   DAC960_Info("  Physical Devices:\n", Controller);
1645   for (PhysicalDeviceIndex = 0;
1646        PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
1647        PhysicalDeviceIndex++)
1648     {
1649       DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
1650         Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
1651       DAC960_SCSI_Inquiry_T *InquiryStandardData =
1652         (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
1653       DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
1654         Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
1655       char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
1656       char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
1657       char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
1658       char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
1659       if (PhysicalDeviceInfo == NULL) break;
1660       DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
1661                                  Vendor, Model, Revision, SerialNumber);
1662       DAC960_Info("    %d:%d%s Vendor: %s  Model: %s  Revision: %s\n",
1663                   Controller,
1664                   PhysicalDeviceInfo->Channel,
1665                   PhysicalDeviceInfo->TargetID,
1666                   (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
1667                   Vendor, Model, Revision);
1668       if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
1669         DAC960_Info("         %sAsynchronous\n", Controller,
1670                     (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1671                      ? "Wide " :""));
1672       else
1673         DAC960_Info("         %sSynchronous at %d MB/sec\n", Controller,
1674                     (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1675                      ? "Wide " :""),
1676                     (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
1677                      * (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
1678                         ? 2 : 1)));
1679       if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
1680         DAC960_Info("         Serial Number: %s\n", Controller, SerialNumber);
1681       if (PhysicalDeviceInfo->PhysicalDeviceState ==
1682           DAC960_V2_Device_Unconfigured)
1683         continue;
1684       DAC960_Info("         Disk Status: %s, %d blocks\n", Controller,
1685                   (PhysicalDeviceInfo->PhysicalDeviceState
1686                    == DAC960_V2_Device_Online
1687                    ? "Online"
1688                    : PhysicalDeviceInfo->PhysicalDeviceState
1689                      == DAC960_V2_Device_WriteOnly
1690                      ? "Write-Only"
1691                      : PhysicalDeviceInfo->PhysicalDeviceState
1692                        == DAC960_V2_Device_Dead
1693                        ? "Dead" : "Standby"),
1694                   PhysicalDeviceInfo
1695                   ->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
1696       if (PhysicalDeviceInfo->ParityErrors == 0 &&
1697           PhysicalDeviceInfo->SoftErrors == 0 &&
1698           PhysicalDeviceInfo->HardErrors == 0 &&
1699           PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
1700           PhysicalDeviceInfo->CommandTimeouts == 0 &&
1701           PhysicalDeviceInfo->Retries == 0 &&
1702           PhysicalDeviceInfo->Aborts == 0 &&
1703           PhysicalDeviceInfo->PredictedFailuresDetected == 0)
1704         continue;
1705       DAC960_Info("         Errors - Parity: %d, Soft: %d, "
1706                   "Hard: %d, Misc: %d\n", Controller,
1707                   PhysicalDeviceInfo->ParityErrors,
1708                   PhysicalDeviceInfo->SoftErrors,
1709                   PhysicalDeviceInfo->HardErrors,
1710                   PhysicalDeviceInfo->MiscellaneousErrors);
1711       DAC960_Info("                  Timeouts: %d, Retries: %d, "
1712                   "Aborts: %d, Predicted: %d\n", Controller,
1713                   PhysicalDeviceInfo->CommandTimeouts,
1714                   PhysicalDeviceInfo->Retries,
1715                   PhysicalDeviceInfo->Aborts,
1716                   PhysicalDeviceInfo->PredictedFailuresDetected);
1717     }
1718   DAC960_Info("  Logical Drives:\n", Controller);
1719   for (LogicalDriveNumber = 0;
1720        LogicalDriveNumber < DAC960_MaxLogicalDrives;
1721        LogicalDriveNumber++)
1722     {
1723       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
1724         Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
1725       unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
1726                                            "Read Cache Enabled",
1727                                            "Read Ahead Enabled",
1728                                            "Intelligent Read Ahead Enabled",
1729                                            "-", "-", "-", "-" };
1730       unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
1731                                             "Logical Device Read Only",
1732                                             "Write Cache Enabled",
1733                                             "Intelligent Write Cache Enabled",
1734                                             "-", "-", "-", "-" };
1735       unsigned char *GeometryTranslation;
1736       if (LogicalDeviceInfo == NULL) continue;
1737       switch(LogicalDeviceInfo->DriveGeometry)
1738         {
1739         case DAC960_V2_Geometry_128_32:
1740           GeometryTranslation = "128/32";
1741           break;
1742         case DAC960_V2_Geometry_255_63:
1743           GeometryTranslation = "255/63";
1744           break;
1745         default:
1746           GeometryTranslation = "Invalid";
1747           DAC960_Error("Illegal Logical Device Geometry %d\n",
1748                        Controller, LogicalDeviceInfo->DriveGeometry);
1749           break;
1750         }
1751       DAC960_Info("    /dev/rd/c%dd%d: RAID-%d, %s, %d blocks\n",
1752                   Controller, Controller->ControllerNumber, LogicalDriveNumber,
1753                   LogicalDeviceInfo->RAIDLevel,
1754                   (LogicalDeviceInfo->LogicalDeviceState
1755                    == DAC960_V2_LogicalDevice_Online
1756                    ? "Online"
1757                    : LogicalDeviceInfo->LogicalDeviceState
1758                      == DAC960_V2_LogicalDevice_Critical
1759                      ? "Critical" : "Offline"),
1760                   LogicalDeviceInfo->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
1761       DAC960_Info("                  Logical Device %s, BIOS Geometry: %s\n",
1762                   Controller,
1763                   (LogicalDeviceInfo->LogicalDeviceControl
1764                                      .LogicalDeviceInitialized
1765                    ? "Initialized" : "Uninitialized"),
1766                   GeometryTranslation);
1767       if (LogicalDeviceInfo->StripeSize == 0)
1768         {
1769           if (LogicalDeviceInfo->CacheLineSize == 0)
1770             DAC960_Info("                  Stripe Size: N/A, "
1771                         "Segment Size: N/A\n", Controller);
1772           else
1773             DAC960_Info("                  Stripe Size: N/A, "
1774                         "Segment Size: %dKB\n", Controller,
1775                         1 << (LogicalDeviceInfo->CacheLineSize - 2));
1776         }
1777       else
1778         {
1779           if (LogicalDeviceInfo->CacheLineSize == 0)
1780             DAC960_Info("                  Stripe Size: %dKB, "
1781                         "Segment Size: N/A\n", Controller,
1782                         1 << (LogicalDeviceInfo->StripeSize - 2));
1783           else
1784             DAC960_Info("                  Stripe Size: %dKB, "
1785                         "Segment Size: %dKB\n", Controller,
1786                         1 << (LogicalDeviceInfo->StripeSize - 2),
1787                         1 << (LogicalDeviceInfo->CacheLineSize - 2));
1788         }
1789       DAC960_Info("                  %s, %s\n", Controller,
1790                   ReadCacheStatus[
1791                     LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
1792                   WriteCacheStatus[
1793                     LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
1794       if (LogicalDeviceInfo->SoftErrors > 0 ||
1795           LogicalDeviceInfo->CommandsFailed > 0 ||
1796           LogicalDeviceInfo->DeferredWriteErrors)
1797         DAC960_Info("                  Errors - Soft: %d, Failed: %d, "
1798                     "Deferred Write: %d\n", Controller,
1799                     LogicalDeviceInfo->SoftErrors,
1800                     LogicalDeviceInfo->CommandsFailed,
1801                     LogicalDeviceInfo->DeferredWriteErrors);
1802
1803     }
1804   return true;
1805 }
1806
1807
1808 /*
1809   DAC960_BackMergeFunction is the Back Merge Function for the DAC960 driver.
1810 */
1811
1812 static int DAC960_BackMergeFunction(RequestQueue_T *RequestQueue,
1813                                     IO_Request_T *Request,
1814                                     BufferHeader_T *BufferHeader,
1815                                     int MaxSegments)
1816 {
1817   DAC960_Controller_T *Controller =
1818     (DAC960_Controller_T *) RequestQueue->queuedata;
1819   if (Request->bhtail->b_data + Request->bhtail->b_size == BufferHeader->b_data)
1820     return true;
1821   if (Request->nr_segments < MaxSegments &&
1822       Request->nr_segments < Controller->DriverScatterGatherLimit)
1823     {
1824       Request->nr_segments++;
1825       return true;
1826     }
1827   return false;
1828 }
1829
1830
1831 /*
1832   DAC960_FrontMergeFunction is the Front Merge Function for the DAC960 driver.
1833 */
1834
1835 static int DAC960_FrontMergeFunction(RequestQueue_T *RequestQueue,
1836                                      IO_Request_T *Request,
1837                                      BufferHeader_T *BufferHeader,
1838                                      int MaxSegments)
1839 {
1840   DAC960_Controller_T *Controller =
1841     (DAC960_Controller_T *) RequestQueue->queuedata;
1842   if (BufferHeader->b_data + BufferHeader->b_size == Request->bh->b_data)
1843     return true;
1844   if (Request->nr_segments < MaxSegments &&
1845       Request->nr_segments < Controller->DriverScatterGatherLimit)
1846     {
1847       Request->nr_segments++;
1848       return true;
1849     }
1850   return false;
1851 }
1852
1853
1854 /*
1855   DAC960_MergeRequestsFunction is the Merge Requests Function for the
1856   DAC960 driver.
1857 */
1858
1859 static int DAC960_MergeRequestsFunction(RequestQueue_T *RequestQueue,
1860                                         IO_Request_T *Request,
1861                                         IO_Request_T *NextRequest,
1862                                         int MaxSegments)
1863 {
1864   DAC960_Controller_T *Controller =
1865     (DAC960_Controller_T *) RequestQueue->queuedata;
1866   int TotalSegments = Request->nr_segments + NextRequest->nr_segments;
1867   if (Request->bhtail->b_data + Request->bhtail->b_size
1868       == NextRequest->bh->b_data)
1869     TotalSegments--;
1870   if (TotalSegments > MaxSegments ||
1871       TotalSegments > Controller->DriverScatterGatherLimit)
1872     return false;
1873   Request->nr_segments = TotalSegments;
1874   return true;
1875 }
1876
1877
1878 /*
1879   DAC960_RegisterBlockDevice registers the Block Device structures
1880   associated with Controller.
1881 */
1882
1883 static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1884 {
1885   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
1886   GenericDiskInfo_T *GenericDiskInfo;
1887   RequestQueue_T *RequestQueue;
1888   int MinorNumber;
1889   /*
1890     Register the Block Device Major Number for this DAC960 Controller.
1891   */
1892   if (devfs_register_blkdev(MajorNumber, "dac960",
1893                             &DAC960_BlockDeviceOperations) < 0)
1894     {
1895       DAC960_Error("UNABLE TO ACQUIRE MAJOR NUMBER %d - DETACHING\n",
1896                    Controller, MajorNumber);
1897       return false;
1898     }
1899   /*
1900     Initialize the I/O Request Queue.
1901   */
1902   RequestQueue = BLK_DEFAULT_QUEUE(MajorNumber);
1903   blk_init_queue(RequestQueue, DAC960_RequestFunction);
1904   blk_queue_headactive(RequestQueue, 0);
1905   RequestQueue->back_merge_fn = DAC960_BackMergeFunction;
1906   RequestQueue->front_merge_fn = DAC960_FrontMergeFunction;
1907   RequestQueue->merge_requests_fn = DAC960_MergeRequestsFunction;
1908   RequestQueue->queuedata = Controller;
1909   Controller->RequestQueue = RequestQueue;
1910   /*
1911     Initialize the Disk Partitions array, Partition Sizes array, Block Sizes
1912     array, and Max Sectors per Request array.
1913   */
1914   for (MinorNumber = 0; MinorNumber < DAC960_MinorCount; MinorNumber++)
1915     {
1916       Controller->BlockSizes[MinorNumber] = BLOCK_SIZE;
1917       Controller->MaxSectorsPerRequest[MinorNumber] =
1918         Controller->MaxBlocksPerCommand;
1919     }
1920   Controller->GenericDiskInfo.part = Controller->DiskPartitions;
1921   Controller->GenericDiskInfo.sizes = Controller->PartitionSizes;
1922   blksize_size[MajorNumber] = Controller->BlockSizes;
1923   max_sectors[MajorNumber] = Controller->MaxSectorsPerRequest;
1924   /*
1925     Initialize Read Ahead to 128 sectors.
1926   */
1927   read_ahead[MajorNumber] = 128;
1928   /*
1929     Complete initialization of the Generic Disk Information structure.
1930   */
1931   Controller->GenericDiskInfo.major = MajorNumber;
1932   Controller->GenericDiskInfo.major_name = "rd";
1933   Controller->GenericDiskInfo.minor_shift = DAC960_MaxPartitionsBits;
1934   Controller->GenericDiskInfo.max_p = DAC960_MaxPartitions;
1935   Controller->GenericDiskInfo.nr_real = Controller->LogicalDriveCount;
1936   Controller->GenericDiskInfo.next = NULL;
1937   Controller->GenericDiskInfo.fops = &DAC960_BlockDeviceOperations;
1938   /*
1939     Install the Generic Disk Information structure at the end of the list.
1940   */
1941   if ((GenericDiskInfo = gendisk_head) != NULL)
1942     {
1943       while (GenericDiskInfo->next != NULL)
1944         GenericDiskInfo = GenericDiskInfo->next;
1945       GenericDiskInfo->next = &Controller->GenericDiskInfo;
1946     }
1947   else gendisk_head = &Controller->GenericDiskInfo;
1948   /*
1949     Indicate the Block Device Registration completed successfully,
1950   */
1951   return true;
1952 }
1953
1954
1955 /*
1956   DAC960_UnregisterBlockDevice unregisters the Block Device structures
1957   associated with Controller.
1958 */
1959
1960 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
1961 {
1962   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
1963   /*
1964     Unregister the Block Device Major Number for this DAC960 Controller.
1965   */
1966   devfs_unregister_blkdev(MajorNumber, "dac960");
1967   /*
1968     Remove the I/O Request Queue.
1969   */
1970   blk_cleanup_queue(BLK_DEFAULT_QUEUE(MajorNumber));
1971   /*
1972     Remove the Disk Partitions array, Partition Sizes array, Block Sizes
1973     array, Max Sectors per Request array, and Max Segments per Request array.
1974   */
1975   Controller->GenericDiskInfo.part = NULL;
1976   Controller->GenericDiskInfo.sizes = NULL;
1977   blk_size[MajorNumber] = NULL;
1978   blksize_size[MajorNumber] = NULL;
1979   max_sectors[MajorNumber] = NULL;
1980   /*
1981     Remove the Generic Disk Information structure from the list.
1982   */
1983   if (gendisk_head != &Controller->GenericDiskInfo)
1984     {
1985       GenericDiskInfo_T *GenericDiskInfo = gendisk_head;
1986       while (GenericDiskInfo != NULL &&
1987              GenericDiskInfo->next != &Controller->GenericDiskInfo)
1988         GenericDiskInfo = GenericDiskInfo->next;
1989       if (GenericDiskInfo != NULL)
1990         GenericDiskInfo->next = GenericDiskInfo->next->next;
1991     }
1992   else gendisk_head = Controller->GenericDiskInfo.next;
1993 }
1994
1995
1996 /*
1997   DAC960_RegisterDisk registers the DAC960 Logical Disk Device for Logical
1998   Drive Number if it exists.
1999 */
2000
2001 static void DAC960_RegisterDisk(DAC960_Controller_T *Controller,
2002                                 int LogicalDriveNumber)
2003 {
2004   if (Controller->FirmwareType == DAC960_V1_Controller)
2005     {
2006       if (LogicalDriveNumber > Controller->LogicalDriveCount - 1) return;
2007       register_disk(&Controller->GenericDiskInfo,
2008                     DAC960_KernelDevice(Controller->ControllerNumber,
2009                                         LogicalDriveNumber, 0),
2010                     DAC960_MaxPartitions, &DAC960_BlockDeviceOperations,
2011                     Controller->V1.LogicalDriveInformation
2012                                    [LogicalDriveNumber].LogicalDriveSize);
2013     }
2014   else
2015     {
2016       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2017         Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2018       if (LogicalDeviceInfo == NULL) return;
2019       register_disk(&Controller->GenericDiskInfo,
2020                     DAC960_KernelDevice(Controller->ControllerNumber,
2021                                         LogicalDriveNumber, 0),
2022                     DAC960_MaxPartitions, &DAC960_BlockDeviceOperations,
2023                     LogicalDeviceInfo
2024                     ->ConfigurableDeviceSizeIn512ByteBlocksOrMB);
2025     }
2026 }
2027
2028
2029 /*
2030   DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2031   the Error Status Register when the driver performs the BIOS handshaking.
2032   It returns true for fatal errors and false otherwise.
2033 */
2034
2035 static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2036                                         unsigned char ErrorStatus,
2037                                         unsigned char Parameter0,
2038                                         unsigned char Parameter1)
2039 {
2040   switch (ErrorStatus)
2041     {
2042     case 0x00:
2043       DAC960_Notice("Physical Device %d:%d Not Responding\n",
2044                     Controller, Parameter1, Parameter0);
2045       break;
2046     case 0x08:
2047       if (Controller->DriveSpinUpMessageDisplayed) break;
2048       DAC960_Notice("Spinning Up Drives\n", Controller);
2049       Controller->DriveSpinUpMessageDisplayed = true;
2050       break;
2051     case 0x30:
2052       DAC960_Notice("Configuration Checksum Error\n", Controller);
2053       break;
2054     case 0x60:
2055       DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2056       break;
2057     case 0x70:
2058       DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2059       break;
2060     case 0x90:
2061       DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2062                     Controller, Parameter1, Parameter0);
2063       break;
2064     case 0xA0:
2065       DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2066       break;
2067     case 0xB0:
2068       DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2069       break;
2070     case 0xD0:
2071       DAC960_Notice("New Controller Configuration Found\n", Controller);
2072       break;
2073     case 0xF0:
2074       DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2075       return true;
2076     default:
2077       DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2078                    Controller, ErrorStatus);
2079       return true;
2080     }
2081   return false;
2082 }
2083
2084
2085 /*
2086   DAC960_DetectControllers detects Mylex DAC960/AcceleRAID/eXtremeRAID
2087   PCI RAID Controllers by interrogating the PCI Configuration Space for
2088   Controller Type.
2089 */
2090
2091 static void DAC960_DetectControllers(DAC960_HardwareType_T HardwareType)
2092 {
2093   void (*InterruptHandler)(int, void *, Registers_T *) = NULL;
2094   DAC960_FirmwareType_T FirmwareType = 0;
2095   unsigned short VendorID = 0, DeviceID = 0;
2096   unsigned int MemoryWindowSize = 0;
2097   PCI_Device_T *PCI_Device = NULL;
2098   switch (HardwareType)
2099     {
2100     case DAC960_BA_Controller:
2101       VendorID = PCI_VENDOR_ID_MYLEX;
2102       DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_BA;
2103       FirmwareType = DAC960_V2_Controller;
2104       InterruptHandler = DAC960_BA_InterruptHandler;
2105       MemoryWindowSize = DAC960_BA_RegisterWindowSize;
2106       break;
2107     case DAC960_LP_Controller:
2108       VendorID = PCI_VENDOR_ID_MYLEX;
2109       DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_LP;
2110       FirmwareType = DAC960_LP_Controller;
2111       InterruptHandler = DAC960_LP_InterruptHandler;
2112       MemoryWindowSize = DAC960_LP_RegisterWindowSize;
2113       break;
2114     case DAC960_LA_Controller:
2115       VendorID = PCI_VENDOR_ID_DEC;
2116       DeviceID = PCI_DEVICE_ID_DEC_21285;
2117       FirmwareType = DAC960_V1_Controller;
2118       InterruptHandler = DAC960_LA_InterruptHandler;
2119       MemoryWindowSize = DAC960_LA_RegisterWindowSize;
2120       break;
2121     case DAC960_PG_Controller:
2122       VendorID = PCI_VENDOR_ID_MYLEX;
2123       DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_PG;
2124       FirmwareType = DAC960_V1_Controller;
2125       InterruptHandler = DAC960_PG_InterruptHandler;
2126       MemoryWindowSize = DAC960_PG_RegisterWindowSize;
2127       break;
2128     case DAC960_PD_Controller:
2129       VendorID = PCI_VENDOR_ID_MYLEX;
2130       DeviceID = PCI_DEVICE_ID_MYLEX_DAC960_PD;
2131       FirmwareType = DAC960_V1_Controller;
2132       InterruptHandler = DAC960_PD_InterruptHandler;
2133       MemoryWindowSize = DAC960_PD_RegisterWindowSize;
2134       break;
2135     }
2136   while ((PCI_Device = pci_find_device(VendorID, DeviceID, PCI_Device)) != NULL)
2137     {
2138       DAC960_Controller_T *Controller = NULL;
2139       DAC960_IO_Address_T IO_Address = 0;
2140       DAC960_PCI_Address_T PCI_Address = 0;
2141       unsigned char Bus = PCI_Device->bus->number;
2142       unsigned char DeviceFunction = PCI_Device->devfn;
2143       unsigned char Device = DeviceFunction >> 3;
2144       unsigned char Function = DeviceFunction & 0x7;
2145       unsigned char ErrorStatus, Parameter0, Parameter1;
2146       unsigned int IRQ_Channel = PCI_Device->irq;
2147       void *BaseAddress;
2148       if (pci_enable_device(PCI_Device) != 0) continue;
2149       switch (HardwareType)
2150         {
2151         case DAC960_BA_Controller:
2152           PCI_Address = pci_resource_start(PCI_Device, 0);
2153           break;
2154         case DAC960_LP_Controller:
2155           PCI_Address = pci_resource_start(PCI_Device, 0);
2156           break;
2157         case DAC960_LA_Controller:
2158           if (!(PCI_Device->subsystem_vendor == PCI_VENDOR_ID_MYLEX &&
2159                 PCI_Device->subsystem_device == PCI_DEVICE_ID_MYLEX_DAC960_LA))
2160             continue;
2161           PCI_Address = pci_resource_start(PCI_Device, 0);
2162           break;
2163         case DAC960_PG_Controller:
2164           PCI_Address = pci_resource_start(PCI_Device, 0);
2165           break;
2166         case DAC960_PD_Controller:
2167           IO_Address = pci_resource_start(PCI_Device, 0);
2168           PCI_Address = pci_resource_start(PCI_Device, 1);
2169           break;
2170         }
2171       if (DAC960_ControllerCount == DAC960_MaxControllers)
2172         {
2173           DAC960_Error("More than %d DAC960 Controllers detected - "
2174                        "ignoring from Controller at\n",
2175                        NULL, DAC960_MaxControllers);
2176           goto Failure;
2177         }
2178       Controller = (DAC960_Controller_T *)
2179         kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2180       if (Controller == NULL)
2181         {
2182           DAC960_Error("Unable to allocate Controller structure for "
2183                        "Controller at\n", NULL);
2184           goto Failure;
2185         }
2186       memset(Controller, 0, sizeof(DAC960_Controller_T));
2187       Controller->ControllerNumber = DAC960_ControllerCount;
2188       init_waitqueue_head(&Controller->CommandWaitQueue);
2189       init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2190       DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2191       DAC960_AnnounceDriver(Controller);
2192       Controller->FirmwareType = FirmwareType;
2193       Controller->HardwareType = HardwareType;
2194       Controller->IO_Address = IO_Address;
2195       Controller->PCI_Address = PCI_Address;
2196       Controller->Bus = Bus;
2197       Controller->Device = Device;
2198       Controller->Function = Function;
2199       /*
2200         Map the Controller Register Window.
2201       */
2202       if (MemoryWindowSize < PAGE_SIZE)
2203         MemoryWindowSize = PAGE_SIZE;
2204       Controller->MemoryMappedAddress =
2205         ioremap_nocache(PCI_Address & PAGE_MASK, MemoryWindowSize);
2206       Controller->BaseAddress =
2207         Controller->MemoryMappedAddress + (PCI_Address & ~PAGE_MASK);
2208       if (Controller->MemoryMappedAddress == NULL)
2209         {
2210           DAC960_Error("Unable to map Controller Register Window for "
2211                        "Controller at\n", Controller);
2212           goto Failure;
2213         }
2214       BaseAddress = Controller->BaseAddress;
2215       switch (HardwareType)
2216         {
2217         case DAC960_BA_Controller:
2218           DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2219           DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2220           udelay(1000);
2221           while (DAC960_BA_InitializationInProgressP(BaseAddress))
2222             {
2223               if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2224                                             &Parameter0, &Parameter1) &&
2225                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2226                                            Parameter0, Parameter1))
2227                 goto Failure;
2228               udelay(10);
2229             }
2230           if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2231             {
2232               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2233                            "for Controller at\n", Controller);
2234               goto Failure;
2235             }
2236           DAC960_BA_EnableInterrupts(Controller->BaseAddress);
2237           Controller->QueueCommand = DAC960_BA_QueueCommand;
2238           Controller->ReadControllerConfiguration =
2239             DAC960_V2_ReadControllerConfiguration;
2240           Controller->ReadDeviceConfiguration =
2241             DAC960_V2_ReadDeviceConfiguration;
2242           Controller->ReportDeviceConfiguration =
2243             DAC960_V2_ReportDeviceConfiguration;
2244           Controller->QueueReadWriteCommand =
2245             DAC960_V2_QueueReadWriteCommand;
2246           break;
2247         case DAC960_LP_Controller:
2248           DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2249           DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2250           udelay(1000);
2251           while (DAC960_LP_InitializationInProgressP(BaseAddress))
2252             {
2253               if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2254                                             &Parameter0, &Parameter1) &&
2255                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2256                                            Parameter0, Parameter1))
2257                 goto Failure;
2258               udelay(10);
2259             }
2260           if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2261             {
2262               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2263                            "for Controller at\n", Controller);
2264               goto Failure;
2265             }
2266           DAC960_LP_EnableInterrupts(Controller->BaseAddress);
2267           Controller->QueueCommand = DAC960_LP_QueueCommand;
2268           Controller->ReadControllerConfiguration =
2269             DAC960_V2_ReadControllerConfiguration;
2270           Controller->ReadDeviceConfiguration =
2271             DAC960_V2_ReadDeviceConfiguration;
2272           Controller->ReportDeviceConfiguration =
2273             DAC960_V2_ReportDeviceConfiguration;
2274           Controller->QueueReadWriteCommand =
2275             DAC960_V2_QueueReadWriteCommand;
2276           break;
2277         case DAC960_LA_Controller:
2278           DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2279           DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2280           udelay(1000);
2281           while (DAC960_LA_InitializationInProgressP(BaseAddress))
2282             {
2283               if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2284                                             &Parameter0, &Parameter1) &&
2285                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2286                                            Parameter0, Parameter1))
2287                 goto Failure;
2288               udelay(10);
2289             }
2290           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2291             {
2292               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2293                            "for Controller at\n", Controller);
2294               goto Failure;
2295             }
2296           DAC960_LA_EnableInterrupts(Controller->BaseAddress);
2297           if (Controller->V1.DualModeMemoryMailboxInterface)
2298             Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2299           else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2300           Controller->ReadControllerConfiguration =
2301             DAC960_V1_ReadControllerConfiguration;
2302           Controller->ReadDeviceConfiguration =
2303             DAC960_V1_ReadDeviceConfiguration;
2304           Controller->ReportDeviceConfiguration =
2305             DAC960_V1_ReportDeviceConfiguration;
2306           Controller->QueueReadWriteCommand =
2307             DAC960_V1_QueueReadWriteCommand;
2308           break;
2309         case DAC960_PG_Controller:
2310           DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2311           DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2312           udelay(1000);
2313           while (DAC960_PG_InitializationInProgressP(BaseAddress))
2314             {
2315               if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2316                                             &Parameter0, &Parameter1) &&
2317                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2318                                            Parameter0, Parameter1))
2319                 goto Failure;
2320               udelay(10);
2321             }
2322           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2323             {
2324               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2325                            "for Controller at\n", Controller);
2326               goto Failure;
2327             }
2328           DAC960_PG_EnableInterrupts(Controller->BaseAddress);
2329           if (Controller->V1.DualModeMemoryMailboxInterface)
2330             Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2331           else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2332           Controller->ReadControllerConfiguration =
2333             DAC960_V1_ReadControllerConfiguration;
2334           Controller->ReadDeviceConfiguration =
2335             DAC960_V1_ReadDeviceConfiguration;
2336           Controller->ReportDeviceConfiguration =
2337             DAC960_V1_ReportDeviceConfiguration;
2338           Controller->QueueReadWriteCommand =
2339             DAC960_V1_QueueReadWriteCommand;
2340           break;
2341         case DAC960_PD_Controller:
2342           request_region(Controller->IO_Address, 0x80,
2343                          Controller->FullModelName);
2344           DAC960_PD_DisableInterrupts(BaseAddress);
2345           DAC960_PD_AcknowledgeStatus(BaseAddress);
2346           udelay(1000);
2347           while (DAC960_PD_InitializationInProgressP(BaseAddress))
2348             {
2349               if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2350                                             &Parameter0, &Parameter1) &&
2351                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2352                                            Parameter0, Parameter1))
2353                 goto Failure;
2354               udelay(10);
2355             }
2356           DAC960_PD_EnableInterrupts(Controller->BaseAddress);
2357           Controller->QueueCommand = DAC960_PD_QueueCommand;
2358           Controller->ReadControllerConfiguration =
2359             DAC960_V1_ReadControllerConfiguration;
2360           Controller->ReadDeviceConfiguration =
2361             DAC960_V1_ReadDeviceConfiguration;
2362           Controller->ReportDeviceConfiguration =
2363             DAC960_V1_ReportDeviceConfiguration;
2364           Controller->QueueReadWriteCommand =
2365             DAC960_V1_QueueReadWriteCommand;
2366           break;
2367         }
2368       /*
2369         Acquire shared access to the IRQ Channel.
2370       */
2371       if (IRQ_Channel == 0)
2372         {
2373           DAC960_Error("IRQ Channel %d illegal for Controller at\n",
2374                        Controller, IRQ_Channel);
2375           goto Failure;
2376         }
2377       strcpy(Controller->FullModelName, "DAC960");
2378       if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ,
2379                       Controller->FullModelName, Controller) < 0)
2380         {
2381           DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
2382                        Controller, IRQ_Channel);
2383           goto Failure;
2384         }
2385       Controller->IRQ_Channel = IRQ_Channel;
2386       DAC960_ActiveControllerCount++;
2387       Controller->InitialCommand.CommandIdentifier = 1;
2388       Controller->InitialCommand.Controller = Controller;
2389       Controller->Commands[0] = &Controller->InitialCommand;
2390       Controller->FreeCommands = &Controller->InitialCommand;
2391       Controller->ControllerDetectionSuccessful = true;
2392       continue;
2393     Failure:
2394       if (IO_Address == 0)
2395         DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
2396                      "PCI Address 0x%X\n", Controller,
2397                      Bus, Device, Function, PCI_Address);
2398       else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
2399                         "0x%X PCI Address 0x%X\n", Controller,
2400                         Bus, Device, Function, IO_Address, PCI_Address);
2401       if (Controller == NULL) break;
2402       if (Controller->MemoryMappedAddress != NULL)
2403         iounmap(Controller->MemoryMappedAddress);
2404       if (Controller->IRQ_Channel > 0)
2405         free_irq(IRQ_Channel, Controller);
2406     }
2407 }
2408
2409
2410 /*
2411   DAC960_SortControllers sorts the Controllers by PCI Bus and Device Number.
2412 */
2413
2414 static void DAC960_SortControllers(void)
2415 {
2416   int ControllerNumber, LastInterchange, Bound, j;
2417   LastInterchange = DAC960_ControllerCount-1;
2418   while (LastInterchange > 0)
2419     {
2420       Bound = LastInterchange;
2421       LastInterchange = 0;
2422       for (j = 0; j < Bound; j++)
2423         {
2424           DAC960_Controller_T *Controller1 = DAC960_Controllers[j];
2425           DAC960_Controller_T *Controller2 = DAC960_Controllers[j+1];
2426           if (Controller1->Bus > Controller2->Bus ||
2427               (Controller1->Bus == Controller2->Bus &&
2428                (Controller1->Device > Controller2->Device)))
2429             {
2430               Controller2->ControllerNumber = j;
2431               DAC960_Controllers[j] = Controller2;
2432               Controller1->ControllerNumber = j+1;
2433               DAC960_Controllers[j+1] = Controller1;
2434               LastInterchange = j;
2435             }
2436         }
2437     }
2438   for (ControllerNumber = 0;
2439        ControllerNumber < DAC960_ControllerCount;
2440        ControllerNumber++)
2441     {
2442       DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
2443       if (!Controller->ControllerDetectionSuccessful)
2444         {
2445           DAC960_Controllers[ControllerNumber] = NULL;
2446           kfree(Controller);
2447         }
2448     }
2449 }
2450
2451
2452 /*
2453   DAC960_InitializeController initializes Controller.
2454 */
2455
2456 static void DAC960_InitializeController(DAC960_Controller_T *Controller)
2457 {
2458   if (DAC960_ReadControllerConfiguration(Controller) &&
2459       DAC960_ReportControllerConfiguration(Controller) &&
2460       DAC960_CreateAuxiliaryStructures(Controller) &&
2461       DAC960_ReadDeviceConfiguration(Controller) &&
2462       DAC960_ReportDeviceConfiguration(Controller) &&
2463       DAC960_RegisterBlockDevice(Controller))
2464     {
2465       /*
2466         Initialize the Monitoring Timer.
2467       */
2468       init_timer(&Controller->MonitoringTimer);
2469       Controller->MonitoringTimer.expires =
2470         jiffies + DAC960_MonitoringTimerInterval;
2471       Controller->MonitoringTimer.data = (unsigned long) Controller;
2472       Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
2473       add_timer(&Controller->MonitoringTimer);
2474       Controller->ControllerInitialized = true;
2475     }
2476   else DAC960_FinalizeController(Controller);
2477 }
2478
2479
2480 /*
2481   DAC960_FinalizeController finalizes Controller.
2482 */
2483
2484 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
2485 {
2486   if (Controller->ControllerInitialized)
2487     {
2488       del_timer(&Controller->MonitoringTimer);
2489       if (Controller->FirmwareType == DAC960_V1_Controller)
2490         {
2491           DAC960_Notice("Flushing Cache...", Controller);
2492           DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, NULL);
2493           DAC960_Notice("done\n", Controller);
2494           switch (Controller->HardwareType)
2495             {
2496             case DAC960_LA_Controller:
2497               if (Controller->V1.DualModeMemoryMailboxInterface)
2498                 free_pages(Controller->MemoryMailboxPagesAddress,
2499                            Controller->MemoryMailboxPagesOrder);
2500               else DAC960_LA_SaveMemoryMailboxInfo(Controller);
2501               break;
2502             case DAC960_PG_Controller:
2503               if (Controller->V1.DualModeMemoryMailboxInterface)
2504                 free_pages(Controller->MemoryMailboxPagesAddress,
2505                            Controller->MemoryMailboxPagesOrder);
2506               else DAC960_PG_SaveMemoryMailboxInfo(Controller);
2507               break;
2508             case DAC960_PD_Controller:
2509               release_region(Controller->IO_Address, 0x80);
2510               break;
2511             default:
2512               break;
2513             }
2514         }
2515       else
2516         {
2517           DAC960_Notice("Flushing Cache...", Controller);
2518           DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
2519                                     DAC960_V2_RAID_Controller);
2520           DAC960_Notice("done\n", Controller);
2521           free_pages(Controller->MemoryMailboxPagesAddress,
2522                      Controller->MemoryMailboxPagesOrder);
2523         }
2524     }
2525   free_irq(Controller->IRQ_Channel, Controller);
2526   iounmap(Controller->MemoryMappedAddress);
2527   DAC960_UnregisterBlockDevice(Controller);
2528   DAC960_DestroyAuxiliaryStructures(Controller);
2529   DAC960_Controllers[Controller->ControllerNumber] = NULL;
2530   kfree(Controller);
2531 }
2532
2533
2534 /*
2535   DAC960_Initialize initializes the DAC960 Driver.
2536 */
2537
2538 void DAC960_Initialize(void)
2539 {
2540   int ControllerNumber;
2541   DAC960_DetectControllers(DAC960_BA_Controller);
2542   DAC960_DetectControllers(DAC960_LP_Controller);
2543   DAC960_DetectControllers(DAC960_LA_Controller);
2544   DAC960_DetectControllers(DAC960_PG_Controller);
2545   DAC960_DetectControllers(DAC960_PD_Controller);
2546   DAC960_SortControllers();
2547   if (DAC960_ActiveControllerCount == 0) return;
2548   for (ControllerNumber = 0;
2549        ControllerNumber < DAC960_ControllerCount;
2550        ControllerNumber++)
2551     {
2552       DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
2553       int LogicalDriveNumber;
2554       if (Controller == NULL) continue;
2555       DAC960_InitializeController(Controller);
2556       for (LogicalDriveNumber = 0;
2557            LogicalDriveNumber < DAC960_MaxLogicalDrives;
2558            LogicalDriveNumber++)
2559         DAC960_RegisterDisk(Controller, LogicalDriveNumber);
2560     }
2561   DAC960_CreateProcEntries();
2562   register_reboot_notifier(&DAC960_NotifierBlock);
2563 }
2564
2565
2566 /*
2567   DAC960_Finalize finalizes the DAC960 Driver.
2568 */
2569
2570 static int DAC960_Finalize(NotifierBlock_T *NotifierBlock,
2571                            unsigned long Event,
2572                            void *Buffer)
2573 {
2574   int ControllerNumber;
2575   if (!(Event == SYS_RESTART || Event == SYS_HALT || Event == SYS_POWER_OFF))
2576     return NOTIFY_DONE;
2577   if (DAC960_ActiveControllerCount == 0) return NOTIFY_OK;
2578   for (ControllerNumber = 0;
2579        ControllerNumber < DAC960_ControllerCount;
2580        ControllerNumber++)
2581     if (DAC960_Controllers[ControllerNumber] != NULL)
2582       DAC960_FinalizeController(DAC960_Controllers[ControllerNumber]);
2583   DAC960_DestroyProcEntries();
2584   unregister_reboot_notifier(&DAC960_NotifierBlock);
2585   return NOTIFY_OK;
2586 }
2587
2588
2589 /*
2590   DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
2591   DAC960 V1 Firmware Controllers.
2592 */
2593
2594 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
2595 {
2596   DAC960_Controller_T *Controller = Command->Controller;
2597   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
2598   DAC960_V1_ClearCommand(Command);
2599   if (Command->SegmentCount == 1)
2600     {
2601       if (Command->CommandType == DAC960_ReadCommand)
2602         CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
2603       else CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
2604       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2605       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
2606       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
2607       CommandMailbox->Type5.BusAddress =
2608         Virtual_to_Bus32(Command->RequestBuffer);
2609     }
2610   else
2611     {
2612       DAC960_V1_ScatterGatherSegment_T
2613         *ScatterGatherList = Command->V1.ScatterGatherList;
2614       BufferHeader_T *BufferHeader = Command->BufferHeader;
2615       char *LastDataEndPointer = NULL;
2616       int SegmentNumber = 0;
2617       if (Command->CommandType == DAC960_ReadCommand)
2618         CommandMailbox->Type5.CommandOpcode =
2619           DAC960_V1_ReadWithOldScatterGather;
2620       else
2621         CommandMailbox->Type5.CommandOpcode =
2622           DAC960_V1_WriteWithOldScatterGather;
2623       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
2624       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
2625       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
2626       CommandMailbox->Type5.BusAddress = Virtual_to_Bus32(ScatterGatherList);
2627       CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
2628       while (BufferHeader != NULL)
2629         {
2630           if (BufferHeader->b_data == LastDataEndPointer)
2631             {
2632               ScatterGatherList[SegmentNumber-1].SegmentByteCount +=
2633                 BufferHeader->b_size;
2634               LastDataEndPointer += BufferHeader->b_size;
2635             }
2636           else
2637             {
2638               ScatterGatherList[SegmentNumber].SegmentDataPointer =
2639                 Virtual_to_Bus32(BufferHeader->b_data);
2640               ScatterGatherList[SegmentNumber].SegmentByteCount =
2641                 BufferHeader->b_size;
2642               LastDataEndPointer = BufferHeader->b_data + BufferHeader->b_size;
2643               if (SegmentNumber++ > Controller->DriverScatterGatherLimit)
2644                 panic("DAC960: Scatter/Gather Segment Overflow\n");
2645             }
2646           BufferHeader = BufferHeader->b_reqnext;
2647         }
2648       if (SegmentNumber != Command->SegmentCount)
2649         panic("DAC960: SegmentNumber != SegmentCount\n");
2650     }
2651   DAC960_QueueCommand(Command);
2652 }
2653
2654
2655 /*
2656   DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
2657   DAC960 V2 Firmware Controllers.
2658 */
2659
2660 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
2661 {
2662   DAC960_Controller_T *Controller = Command->Controller;
2663   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
2664   DAC960_V2_ClearCommand(Command);
2665   CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
2666   CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
2667     (Command->CommandType == DAC960_ReadCommand);
2668   CommandMailbox->SCSI_10.DataTransferSize =
2669     Command->BlockCount << DAC960_BlockSizeBits;
2670   CommandMailbox->SCSI_10.RequestSenseBusAddress =
2671     Virtual_to_Bus64(&Command->V2.RequestSense);
2672   CommandMailbox->SCSI_10.PhysicalDevice =
2673     Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
2674   CommandMailbox->SCSI_10.RequestSenseSize =
2675     sizeof(DAC960_SCSI_RequestSense_T);
2676   CommandMailbox->SCSI_10.CDBLength = 10;
2677   CommandMailbox->SCSI_10.SCSI_CDB[0] =
2678     (Command->CommandType == DAC960_ReadCommand ? 0x28 : 0x2A);
2679   CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
2680   CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
2681   CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
2682   CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
2683   CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
2684   CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
2685   if (Command->SegmentCount == 1)
2686     {
2687       CommandMailbox->SCSI_10.DataTransferMemoryAddress
2688                              .ScatterGatherSegments[0]
2689                              .SegmentDataPointer =
2690         Virtual_to_Bus64(Command->RequestBuffer);
2691       CommandMailbox->SCSI_10.DataTransferMemoryAddress
2692                              .ScatterGatherSegments[0]
2693                              .SegmentByteCount =
2694         CommandMailbox->SCSI_10.DataTransferSize;
2695     }
2696   else
2697     {
2698       DAC960_V2_ScatterGatherSegment_T
2699         *ScatterGatherList = Command->V2.ScatterGatherList;
2700       BufferHeader_T *BufferHeader = Command->BufferHeader;
2701       char *LastDataEndPointer = NULL;
2702       int SegmentNumber = 0;
2703       if (Command->SegmentCount > 2)
2704         {
2705           CommandMailbox->SCSI_10.CommandControlBits
2706                          .AdditionalScatterGatherListMemory = true;
2707           CommandMailbox->SCSI_10.DataTransferMemoryAddress
2708                          .ExtendedScatterGather.ScatterGatherList0Length =
2709             Command->SegmentCount;
2710           CommandMailbox->SCSI_10.DataTransferMemoryAddress
2711                          .ExtendedScatterGather.ScatterGatherList0Address =
2712             Virtual_to_Bus64(ScatterGatherList);
2713         }
2714       else
2715         ScatterGatherList =
2716           CommandMailbox->SCSI_10.DataTransferMemoryAddress
2717                                  .ScatterGatherSegments;
2718       while (BufferHeader != NULL)
2719         {
2720           if (BufferHeader->b_data == LastDataEndPointer)
2721             {
2722               ScatterGatherList[SegmentNumber-1].SegmentByteCount +=
2723                 BufferHeader->b_size;
2724               LastDataEndPointer += BufferHeader->b_size;
2725             }
2726           else
2727             {
2728               ScatterGatherList[SegmentNumber].SegmentDataPointer =
2729                 Virtual_to_Bus64(BufferHeader->b_data);
2730               ScatterGatherList[SegmentNumber].SegmentByteCount =
2731                 BufferHeader->b_size;
2732               LastDataEndPointer = BufferHeader->b_data + BufferHeader->b_size;
2733               if (SegmentNumber++ > Controller->DriverScatterGatherLimit)
2734                 panic("DAC960: Scatter/Gather Segment Overflow\n");
2735             }
2736           BufferHeader = BufferHeader->b_reqnext;
2737         }
2738       if (SegmentNumber != Command->SegmentCount)
2739         panic("DAC960: SegmentNumber != SegmentCount\n");
2740     }
2741   DAC960_QueueCommand(Command);
2742 }
2743
2744
2745 /*
2746   DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
2747   I/O Request Queue and queues it to the Controller.  WaitForCommand is true if
2748   this function should wait for a Command to become available if necessary.
2749   This function returns true if an I/O Request was queued and false otherwise.
2750 */
2751
2752 static boolean DAC960_ProcessRequest(DAC960_Controller_T *Controller,
2753                                      boolean WaitForCommand)
2754 {
2755   RequestQueue_T *RequestQueue = Controller->RequestQueue;
2756   ListHead_T *RequestQueueHead;
2757   IO_Request_T *Request;
2758   DAC960_Command_T *Command;
2759   if (RequestQueue == NULL) return false;
2760   RequestQueueHead = &RequestQueue->queue_head;
2761   while (true)
2762     {
2763       if (list_empty(RequestQueueHead)) return false;
2764       Request = blkdev_entry_next_request(RequestQueueHead);
2765       Command = DAC960_AllocateCommand(Controller);
2766       if (Command != NULL) break;
2767       if (!WaitForCommand) return false;
2768       DAC960_WaitForCommand(Controller);
2769     }
2770   if (Request->cmd == READ)
2771     Command->CommandType = DAC960_ReadCommand;
2772   else Command->CommandType = DAC960_WriteCommand;
2773   Command->Completion = Request->waiting;
2774   Command->LogicalDriveNumber = DAC960_LogicalDriveNumber(Request->rq_dev);
2775   Command->BlockNumber =
2776     Request->sector
2777     + Controller->GenericDiskInfo.part[MINOR(Request->rq_dev)].start_sect;
2778   Command->BlockCount = Request->nr_sectors;
2779   Command->SegmentCount = Request->nr_segments;
2780   Command->BufferHeader = Request->bh;
2781   Command->RequestBuffer = Request->buffer;
2782   blkdev_dequeue_request(Request);
2783   blkdev_release_request(Request);
2784   DAC960_QueueReadWriteCommand(Command);
2785   return true;
2786 }
2787
2788
2789 /*
2790   DAC960_ProcessRequests attempts to remove as many I/O Requests as possible
2791   from Controller's I/O Request Queue and queue them to the Controller.
2792 */
2793
2794 static inline void DAC960_ProcessRequests(DAC960_Controller_T *Controller)
2795 {
2796   int Counter = 0;
2797   while (DAC960_ProcessRequest(Controller, Counter++ == 0)) ;
2798 }
2799
2800
2801 /*
2802   DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
2803 */
2804
2805 static void DAC960_RequestFunction(RequestQueue_T *RequestQueue)
2806 {
2807   DAC960_Controller_T *Controller =
2808     (DAC960_Controller_T *) RequestQueue->queuedata;
2809   ProcessorFlags_T ProcessorFlags;
2810   /*
2811     Acquire exclusive access to Controller.
2812   */
2813   DAC960_AcquireControllerLockRF(Controller, &ProcessorFlags);
2814   /*
2815     Process I/O Requests for Controller.
2816   */
2817   DAC960_ProcessRequests(Controller);
2818   /*
2819     Release exclusive access to Controller.
2820   */
2821   DAC960_ReleaseControllerLockRF(Controller, &ProcessorFlags);