linux-omap-mmc:linux-26.git
5 years agoarm: omap: hsmmc: enable context loss counter omap5_driver_mmc_sduhs_3v4rc4
Balaji T K [Mon, 30 Jan 2012 14:24:15 +0000 (19:54 +0530)]
arm: omap: hsmmc: enable context loss counter

enable context loss count API for omap5

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agommc: omap: balance regulator calls
Balaji T K [Fri, 20 Jan 2012 17:31:33 +0000 (18:31 +0100)]
mmc: omap: balance regulator calls

do not check the ret value to balance host->vcc_aux regulator calls
for eMMC incase regulator host->vcc errors

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoarm: omap5evm: add ddr50 uhs capability to omap_hsmmc
Balaji T K [Tue, 23 Aug 2011 16:27:28 +0000 (21:57 +0530)]
arm: omap5evm: add ddr50 uhs capability to omap_hsmmc

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agommc: omap: UHS-I voltage switch
Balaji T K [Tue, 23 Aug 2011 16:27:29 +0000 (21:57 +0530)]
mmc: omap: UHS-I voltage switch

add support for voltage switch needed for UHS-I card
sdcard data io voltage is reduced from VDD to 1.8V for UHS-I card

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoregulator: palmas: ldo9: remove bypass mode
Balaji T K [Fri, 20 Jan 2012 17:31:14 +0000 (18:31 +0100)]
regulator: palmas: ldo9: remove bypass mode

ldo9 powers sdcard_vdds of OMAP5
remove bypass mode in ldo9 to configure it to 1.8 or 3V
for SD UHS-I cards.
while at it correct palmas i2c read/write api for LDO

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoarm: omap5evm: vmmc: max voltage change and binding
Balaji T K [Thu, 29 Dec 2011 15:11:55 +0000 (20:41 +0530)]
arm: omap5evm: vmmc: max voltage change and binding

ldo9 supplies VDDS_SDCARD1 - pbias cell of MMC1
create binding between ldo9 - vmmc regulator and hsmmc driver
SD card i/o lines can operate 3V, update max_uV accordingly.

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoarm: omap5evm: add fixed regulator support for SDCARD/MMC1
Balaji T K [Thu, 29 Dec 2011 15:11:50 +0000 (20:41 +0530)]
arm: omap5evm: add fixed regulator support for SDCARD/MMC1

In omap5evm board, sdcard and eMMC are supplied by same 3V fixed regulator
Add support for vmmc fixed regulator.

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoMerge branch 'omap5_3v3rc4_palmas' into testingv3
Balaji T K [Thu, 10 May 2012 07:27:59 +0000 (12:57 +0530)]
Merge branch 'omap5_3v3rc4_palmas' into testingv3
git://gitorious.org/omap-audio/linux-audio.git sgc/topic/3.4_palmas

* omap5_3v3rc4_palmas:
  OMAP5: I2C: Add init for I2C bus.
  OMAP5: I2C: Return Number of ports as 5 for omap5
  MFD: palmas PMIC device module init update in order to probe earlier
  OMAP5: Update number of IRQS in order to proble PALMAS
  ARM: OMAP5: Board file changes to enable Palmas
  INPUT: KEY: Add Power button input key event driver
  MFD: Add support for Palmas PWM generator
  WDT: add Palmas Watchdog support
  LED: Add support for Palmas LEDs
  RTC: palmas RTC support
  MFD: Palmas RESOURCE IP block driver
  REGULATOR: regulator driver for Palmas series chips
  GPIO: Add Palmas GPIO support
  MFD: Palmas GPADC Support
  MFD: palmas PMIC device support
  ARM: OMAP5: Correct the build error when EMIF enabled.
  ARM: OMAP4/5: Reserve some sram space.

Conflicts:
arch/arm/mach-omap2/board-omap5evm.c

Signed-off-by: Balaji T K <balajitk@ti.com>
modified:   ../arch/arm/mach-omap2/board-omap5evm.c
modified:   ../arch/arm/plat-omap/Kconfig
modified:   ../arch/arm/plat-omap/include/plat/irqs.h
modified:   ../arch/arm/plat-omap/sram.c
modified:   ../drivers/gpio/Kconfig
modified:   ../drivers/gpio/Makefile
new file:   ../drivers/gpio/gpio-palmas.c
modified:   ../drivers/input/misc/Kconfig
modified:   ../drivers/input/misc/Makefile
new file:   ../drivers/input/misc/palmas-pwrbutton.c
modified:   ../drivers/leds/Kconfig
modified:   ../drivers/leds/Makefile
new file:   ../drivers/leds/leds-palmas.c
modified:   ../drivers/mfd/Kconfig
modified:   ../drivers/mfd/Makefile
new file:   ../drivers/mfd/palmas-gpadc.c
new file:   ../drivers/mfd/palmas-irq.c
new file:   ../drivers/mfd/palmas-pwm.c
new file:   ../drivers/mfd/palmas-resource.c
new file:   ../drivers/mfd/palmas.c
modified:   ../drivers/regulator/Kconfig
modified:   ../drivers/regulator/Makefile
new file:   ../drivers/regulator/palmas-regulator.c
modified:   ../drivers/rtc/rtc-twl.c
modified:   ../drivers/watchdog/Kconfig
modified:   ../drivers/watchdog/Makefile
new file:   ../drivers/watchdog/palmas_wdt.c
new file:   ../include/linux/i2c/twl-rtc.h
new file:   ../include/linux/mfd/palmas.h

Change-Id: I177a98217bd2b1620b501518aedfee56729e9ab2

5 years agoMerge branch 'omap5evm_board_mmc_3v4rc4' into testingv3
Balaji T K [Wed, 2 May 2012 14:53:37 +0000 (20:23 +0530)]
Merge branch 'omap5evm_board_mmc_3v4rc4' into testingv3

* omap5evm_board_mmc_3v4rc4:
  arm: omap5evm: hsmmc: add DDR support
  arm: omap5evm: Add ocr_mask to mmc1 sd slot
  arm: omap5evm: Add HSMMC support in omap5 evm boardfile

5 years agoMerge branch 'omap5_driver_mmc_3v4rc4' into testingv3
Balaji T K [Wed, 2 May 2012 14:53:15 +0000 (20:23 +0530)]
Merge branch 'omap5_driver_mmc_3v4rc4' into testingv3

* omap5_driver_mmc_3v4rc4:
  mmc: omap5: set debounce time for sd card detect gpio
  mmc: omap: hsmmc: Enable Auto CMD12
  mmc: Fix bug to enable DDR on MMC
  mmc: omap: add DDR support to omap_hsmmc

5 years agoarm: omap5evm: hsmmc: add DDR support omap5evm_board_mmc_3v4rc4
Balaji T K [Mon, 16 Jan 2012 16:00:00 +0000 (17:00 +0100)]
arm: omap5evm: hsmmc: add DDR support

Enable DDR support for eMMC/MMC2

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoarm: omap5evm: Add ocr_mask to mmc1 sd slot
Balaji T K [Wed, 2 May 2012 14:29:22 +0000 (19:59 +0530)]
arm: omap5evm: Add ocr_mask to mmc1 sd slot

Temporary hack until palmas regulator support is avaliable to expose supported
voltage range.

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoarm: omap5evm: Add HSMMC support in omap5 evm boardfile
Sourav Poddar [Wed, 25 May 2011 09:29:24 +0000 (14:59 +0530)]
arm: omap5evm: Add HSMMC support in omap5 evm boardfile

add support for eMMC and SD to omap5 evm board
enable hsmmc for OMAP5

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
5 years agoMerge branch 'ldc_spi' of git://gitorious.org/linus-tree/linus-tree into connectivity
Felipe Balbi [Wed, 2 May 2012 14:11:49 +0000 (17:11 +0300)]
Merge branch 'ldc_spi' of git://gitorious.org/linus-tree/linus-tree into connectivity

* 'ldc_spi' of git://gitorious.org/linus-tree/linus-tree:
  spi: omap2-mcspi: Trivial optimisation
  spi: omap2-mcspi: use devm_* functions
  spi: omap2-mcspi: convert to module_platform_driver
  spi: omap2-mcspi: make it behave as a module
  spi/omap: Remove bus_num usage for instance index

5 years agoMerge branch 'depends-on-connectivity' of git://gitorious.org/linus-tree/linus-tree...
Felipe Balbi [Wed, 2 May 2012 14:11:43 +0000 (17:11 +0300)]
Merge branch 'depends-on-connectivity' of git://gitorious.org/linus-tree/linus-tree into connectivity

* 'depends-on-connectivity' of git://gitorious.org/linus-tree/linus-tree:
  I2C: OMAP5: Add support for I2C5
  ARM: OMAP5: hwmod data: I2C: Update the flags for I2C5
  I2C: OMAP5: I2C board file support
  ARM: OMAP4: hwmod data: I2C: add flag for context restore

5 years agoI2C: OMAP5: Add support for I2C5
Shubhrajyoti D [Wed, 2 May 2012 11:32:40 +0000 (17:02 +0530)]
I2C: OMAP5: Add support for I2C5

OMAP5 has an extra instance of I2C add support for
the same. Increase the max controller count to 5.
Also make the port count for omap5 to 5.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agoARM: OMAP5: hwmod data: I2C: Update the flags for I2C5
Shubhrajyoti D [Wed, 2 May 2012 11:26:12 +0000 (16:56 +0530)]
ARM: OMAP5: hwmod data: I2C: Update the flags for I2C5

OMAP5 has an extra instance of i2c.
Set the flags for clockactivity and to indicate 16 bit flag.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agommc: omap5: set debounce time for sd card detect gpio omap5_driver_mmc_3v4rc4
Balaji T K [Fri, 20 Jan 2012 17:31:08 +0000 (18:31 +0100)]
mmc: omap5: set debounce time for sd card detect gpio

set card detect debounce time to 50mS

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agommc: omap: hsmmc: Enable Auto CMD12
Balaji T K [Tue, 23 Aug 2011 16:27:27 +0000 (21:57 +0530)]
mmc: omap: hsmmc: Enable Auto CMD12

Enable Auto-CMD12 for multi block read/write on HSMMC

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agommc: Fix bug to enable DDR on MMC
Viswanath Puttagunta [Mon, 5 Dec 2011 13:22:23 +0000 (18:52 +0530)]
mmc: Fix bug to enable DDR on MMC

MMC_CAP_UHS_DDR50 is an SD card feature and not
MMC feature. We don't have to check for this flag
to enable DDR on MMC. Checking for MMC_CAP_1.8V_DDR
is sufficient.

Signed-off-by: Viswanath Puttagunta <vishp@ti.com>
5 years agommc: omap: add DDR support to omap_hsmmc
Balaji T K [Mon, 5 Dec 2011 13:22:21 +0000 (18:52 +0530)]
mmc: omap: add DDR support to omap_hsmmc

Add DDR support for omap_hsmmc

Signed-off-by: Balaji T K <balajitk@ti.com>
5 years agoI2C: OMAP5: I2C board file support
Shubhrajyoti D [Wed, 2 May 2012 09:00:13 +0000 (14:30 +0530)]
I2C: OMAP5: I2C board file support

Adds the board file support for OMAP5.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agoARM: OMAP4: hwmod data: I2C: add flag for context restore
Shubhrajyoti D [Mon, 30 Apr 2012 14:54:30 +0000 (20:24 +0530)]
ARM: OMAP4: hwmod data: I2C: add flag for context restore

Restore of context is not done for OMAP4. This patch
adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the OMAP4
hwmod data which activates the restore for OMAP4.
Currently the OMAP4 does not hit device off still the
driver may have support for it.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agospi: omap2-mcspi: Trivial optimisation
Shubhrajyoti D [Thu, 29 Mar 2012 16:41:07 +0000 (22:11 +0530)]
spi: omap2-mcspi: Trivial optimisation

Trivial optimisation of tmp variable by directly writing the value
to the register.

Cc :  Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agoOMAP5: I2C: Add init for I2C bus.
Sebastien Guiriec [Sat, 28 Apr 2012 20:59:01 +0000 (22:59 +0200)]
OMAP5: I2C: Add init for I2C bus.

5 years agoOMAP5: I2C: Return Number of ports as 5 for omap5
Mythri P K [Thu, 12 Apr 2012 13:18:40 +0000 (18:48 +0530)]
OMAP5: I2C: Return Number of ports as 5 for omap5

Number of i2c ports on omap5 is 5, returning 4 makes the the init call
bus 5 to fail and results in a crashdump.

5 years agoMFD: palmas PMIC device module init update in order to probe earlier
Sebastien Guiriec [Thu, 5 Apr 2012 12:27:56 +0000 (14:27 +0200)]
MFD: palmas PMIC device module init update in order to probe earlier

Move palmas form module_int to subsys_initcall in order to have
regulator probe before Phoenix Audio.

Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
5 years agoOMAP5: Update number of IRQS in order to proble PALMAS
Sebastien Guiriec [Tue, 3 Apr 2012 12:41:22 +0000 (14:41 +0200)]
OMAP5: Update number of IRQS in order to proble PALMAS

5 years agoARM: OMAP5: Board file changes to enable Palmas
Sebastien Guiriec [Mon, 2 Apr 2012 21:02:22 +0000 (23:02 +0200)]
ARM: OMAP5: Board file changes to enable Palmas

Update board file for 3.4-rc1 kernel in order to probe
PALMAS power IC.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
Conflicts:

arch/arm/mach-omap2/board-omap5evm.c

OMAP5: Board file clean up for PALMAS (to be squash)

5 years agoINPUT: KEY: Add Power button input key event driver
Girish S G [Fri, 3 Feb 2012 14:50:25 +0000 (20:20 +0530)]
INPUT: KEY: Add Power button input key event driver

This patch adds palmas power button as a input event driver. This
will be mapped as power button key in the userland.

Signed-off-by: Girish S G <girishsg@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
5 years agoMFD: Add support for Palmas PWM generator
Sebastien Guiriec [Wed, 4 Apr 2012 15:01:25 +0000 (17:01 +0200)]
MFD: Add support for Palmas PWM generator

Palmas has ability to produce PWM on two pins that can be selected
by the mux regsters. It is limited to two frequencies 125Hz and 62.5hz.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Conflicts:

drivers/mfd/Makefile

5 years agoWDT: add Palmas Watchdog support
Graeme Gregory [Thu, 15 Dec 2011 20:46:45 +0000 (14:46 -0600)]
WDT: add Palmas Watchdog support

Add support for the Palmas watchdog timer which has a timeout configurable
from 1s to 128s.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
5 years agoLED: Add support for Palmas LEDs
Graeme Gregory [Thu, 15 Dec 2011 19:22:43 +0000 (13:22 -0600)]
LED: Add support for Palmas LEDs

The Palmas familly of chips has LED support. This is not always muxed
to output pins so depending on the setting of the mux this driver
will create the appropriate LED class devices.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
5 years agoRTC: palmas RTC support
Sebastien Guiriec [Tue, 17 Apr 2012 18:51:38 +0000 (20:51 +0200)]
RTC: palmas RTC support

Rough and ready patch to support palmas RTC using twl driver. This
still needs work to clean up and split out the diffs correctly.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Conflicts:

drivers/rtc/rtc-twl.c

5 years agoMFD: Palmas RESOURCE IP block driver
Sebastien Guiriec [Wed, 4 Apr 2012 14:57:27 +0000 (16:57 +0200)]
MFD: Palmas RESOURCE IP block driver

The Resource IP block controls the NSLEEP, ENABLE1, ENABLE2, pin actions.
As well as controlling the clk32kg* clocks and regen* pins.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Conflicts:

drivers/mfd/Makefile

5 years agoREGULATOR: regulator driver for Palmas series chips
Sebastien Guiriec [Wed, 4 Apr 2012 14:56:03 +0000 (16:56 +0200)]
REGULATOR: regulator driver for Palmas series chips

Palmas has both Switched Mode (SMPS) and Linear (LDO) regulators in it.
This regulator driver allows software control of these regulators.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Conflicts:

drivers/regulator/Makefile

5 years agoGPIO: Add Palmas GPIO support
Graeme Gregory [Fri, 21 Oct 2011 14:10:43 +0000 (15:10 +0100)]
GPIO: Add Palmas GPIO support

Palmas has a maximum of 8 GPIO available but depending on the package and
OTP programming of the chip they may not all be exposed to pins on the
chip

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
5 years agoMFD: Palmas GPADC Support
Sebastien Guiriec [Wed, 4 Apr 2012 14:53:47 +0000 (16:53 +0200)]
MFD: Palmas GPADC Support

The Palmas has a 15 channel ADC which has two asynchronous reading modes
and one software controlled mode. One of the asynchronous modes can
automatically compare voltages with a threshold and raise an interrupt
when the voltage crosses the threshold. The resolution of the ADC is
12 bits.

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Conflicts:

drivers/mfd/Makefile

5 years agoMFD: palmas PMIC device support
Sebastien Guiriec [Wed, 4 Apr 2012 14:52:49 +0000 (16:52 +0200)]
MFD: palmas PMIC device support

Palmas is a PMIC from Texas Instruments and this is the MFD part of the
driver for this chip. The PMIC has SMPS and LDO regulators, a general
purpose ADC, GPIO, USB OTG mode detection, watchdog and RTC features.

Contains WIP code to start to support sharing the rtc-twl as its
the same IP block

Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Conflicts:

drivers/mfd/Kconfig
drivers/mfd/Makefile

5 years agospi: omap2-mcspi: use devm_* functions
Shubhrajyoti D [Mon, 26 Mar 2012 08:45:11 +0000 (14:15 +0530)]
spi: omap2-mcspi: use devm_* functions

The various devm_* functions allocate memory that is released when a driver
detaches. This patch uses devm_request_and_ioremap
to request memory in probe function. Since the freeing is not
needed the calls are deleted from remove function.Also use
use devm_kzalloc for the cs memory allocation.

Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agospi: omap2-mcspi: convert to module_platform_driver
Felipe Balbi [Wed, 14 Mar 2012 09:18:31 +0000 (11:18 +0200)]
spi: omap2-mcspi: convert to module_platform_driver

this will delete a few lines of code, no functional
changes.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agospi: omap2-mcspi: make it behave as a module
Felipe Balbi [Mon, 26 Mar 2012 08:42:35 +0000 (14:12 +0530)]
spi: omap2-mcspi: make it behave as a module

move probe away from __init section and use
platform_driver_register() instead of
platform_driver_probe().

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agospi/omap: Remove bus_num usage for instance index
Benoit Cousson [Mon, 26 Mar 2012 10:02:33 +0000 (15:32 +0530)]
spi/omap: Remove bus_num usage for instance index

bus_num was used to reference the mcspi controller instance in a fixed array.
Remove this array and store this information directly inside drvdata structure.

bus_num is now just set if the pdev->id is present or with -1 for dynamic
allocation by SPI core, but the driver does not access it anymore.

Clean some bad comments format, and remove un-needed space.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[Cleanup the OMAP2_MCSPI_MAX_CTRL macro as it is not needed anymore]
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
5 years agoMerge branch 'depends_on_connectivity_sourav' of git://gitorious.org/linux-connectivi...
Felipe Balbi [Mon, 30 Apr 2012 13:14:11 +0000 (16:14 +0300)]
Merge branch 'depends_on_connectivity_sourav' of git://gitorious.org/linux-connectivity/linux-connectivity into connectivity

* 'depends_on_connectivity_sourav' of git://gitorious.org/linux-connectivity/linux-connectivity:
  omap5: evm: Add omap5 onchip keypad board data

5 years agoMerge branch 'onchip_keypad' of git://gitorious.org/linux-connectivity/linux-connecti...
Felipe Balbi [Mon, 30 Apr 2012 13:13:55 +0000 (16:13 +0300)]
Merge branch 'onchip_keypad' of git://gitorious.org/linux-connectivity/linux-connectivity into connectivity

* 'onchip_keypad' of git://gitorious.org/linux-connectivity/linux-connectivity:
  arm/dts: omap4-sdp: Add keypad data
  drivers: input: keypad: Add device tree support
  Input: omap-keypad: dynamically handle register offsets

5 years ago omap5: evm: Add omap5 onchip keypad board data
G, Manjunath Kondaiah [Fri, 23 Sep 2011 13:21:34 +0000 (18:51 +0530)]
omap5: evm: Add omap5 onchip keypad board data

    Enable qwerty keypad interface for omap5.
    Update omap5 board board with key mapping specific data.

Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
5 years agoarm/dts: omap4-sdp: Add keypad data
Sourav Poddar [Wed, 4 Apr 2012 13:30:20 +0000 (19:00 +0530)]
arm/dts: omap4-sdp: Add keypad data

Add keypad data node in omap4 device tree file.
Also fill the device tree binding parameters
with the required value in "omap4-sdp" dts file.

Tested on omap44330 sdp with 3.4-rc3 kernel.

Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
5 years agodrivers: input: keypad: Add device tree support
Sourav Poddar [Wed, 4 Apr 2012 13:30:21 +0000 (19:00 +0530)]
drivers: input: keypad: Add device tree support

Update the Documentation with omap4 keypad device tree
binding information.
Add device tree support for omap4 keypad driver.

Tested on omap4430 sdp with 3.4-rc3.

Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
5 years agoInput: omap-keypad: dynamically handle register offsets
G, Manjunath Kondaiah [Mon, 10 Oct 2011 15:22:05 +0000 (20:52 +0530)]
Input: omap-keypad: dynamically handle register offsets

Keypad controller register offsets are different for omap4
and omap5. Handle these offsets through static mapping and
assign these mappings during run time.

Tested on omap4430 sdp with 3.4-rc3.
Tested on omap5430evm with 3.1-custom kernel.

Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: G, Manjunath Kondaiah <manjugk@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
5 years agoARM: OMAP5: Correct the build error when EMIF enabled.
R Sricharan [Wed, 25 Apr 2012 11:20:50 +0000 (16:50 +0530)]
ARM: OMAP5: Correct the build error when EMIF enabled.

The endif statement was missing when emif was enabled.
So correct this.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
5 years agoARM: OMAP4/5: Reserve some sram space.
R Sricharan [Wed, 25 Apr 2012 11:18:34 +0000 (16:48 +0530)]
ARM: OMAP4/5: Reserve some sram space.

The kernel needs no more than 4KB of SRAM for its
use. So reserving some SRAM in case of both OMAP4/5
platforms.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
5 years agoMerge branch 'fixes' into connectivity
Felipe Balbi [Wed, 25 Apr 2012 11:44:58 +0000 (14:44 +0300)]
Merge branch 'fixes' into connectivity

* fixes:
  usb: gadget: dummy: do not call pullup() on udc_stop()
  usb: musb: davinci.c: add missing unregister
  usb: musb: drop __deprecated flag
  USB: gadget: storage gadgets send wrong error code for unknown commands
  usb: otg: gpio_vbus: Add otg transceiver events and notifiers

5 years agoRebuild connectivity tree
Felipe Balbi [Wed, 25 Apr 2012 11:39:47 +0000 (14:39 +0300)]
Rebuild connectivity tree

5 years agoMerge branch 'omap5-arch-changes' into tmp
Felipe Balbi [Wed, 25 Apr 2012 11:33:36 +0000 (14:33 +0300)]
Merge branch 'omap5-arch-changes' into tmp

* omap5-arch-changes:
  arm: omap5: select USB_ARCH_HAS_EHCI and USB_ARCH_HAS_XHCI

5 years agoarm: omap5: select USB_ARCH_HAS_EHCI and USB_ARCH_HAS_XHCI
Felipe Balbi [Tue, 24 Apr 2012 11:38:11 +0000 (14:38 +0300)]
arm: omap5: select USB_ARCH_HAS_EHCI and USB_ARCH_HAS_XHCI

OMAP5 has both EHCI and xHCI controllers and
we need to select those symbols.

Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agoMerge branch 'dwc3-u1-u2-lpm' into tmp
Felipe Balbi [Wed, 25 Apr 2012 11:31:31 +0000 (14:31 +0300)]
Merge branch 'dwc3-u1-u2-lpm' into tmp

* dwc3-u1-u2-lpm:
  usb: dwc3: ep0: implement support for Set Isoch Delay request
  usb: dwc3: gadget: increase setup buffer size
  usb: dwc3: ep0: add a default case for SetFeature command
  usb: dwc3: ep0: implement Set SEL support
  usb: dwc3: gadget: implement Global Command support
  usb: ch9: define Set SEL and Set Isoch Delay macros
  usb: dwc3: ep0: add LPM handling

5 years agoMerge branch 'dwc3' into tmp
Felipe Balbi [Wed, 25 Apr 2012 11:31:22 +0000 (14:31 +0300)]
Merge branch 'dwc3' into tmp

* dwc3:
  usb: dwc3: core: split host address space
  usb: dwc3: omap: add dwc3_omap_readl/writel functions
  usb: dwc3: workaround: metastability state on Run/Stop bit
  usb: dwc3: core: define more revision macros

5 years agoMerge branch 'gadget' into tmp
Felipe Balbi [Wed, 25 Apr 2012 11:30:54 +0000 (14:30 +0300)]
Merge branch 'gadget' into tmp

* gadget: (35 commits)
  usb: gadget: add a sparse endian notation
  usb: gadget: r8a66597-udc: add support for set_selfpowered
  usb: gadget: Include i.MX processors in the USB_FSL_USB2 help text
  usb: gadget: fsl_udc_core: dTD's next dtd pointer need to be updated once written
  usb: gadget: inode: remove compile warning
  usb: gadget: composite: prevent a memory leak when configuration bind fails
  usb: gadget: f_mass_storage: remove deprecated fsg_add()
  usb: renesas_usbhs: gadget: add support for set_selfpowered
  usb: gadget: dummy_hcd: allow to free requests on disabled endpoints
  usb: gadget: make g_printer use composite
  usb: gadget: remove DUALSPEED from printer
  usb: gadget: imx_udc: convert to new style start/stop
  usb: gadget: fsl_qe_udc: remove not implemented callbacks
  usb: gadget: fsl_qe_udc: convert to new style start/stop
  usb: gadget: atmel_usba_udc: convert to newstyle start/stop interface
  usb: gadget: at91_udc: convert to new style start/stop interface
  usb: gadget: Update s3c-hsudc to use usb_endpoint_descriptor inside the struct usb_ep
  usb: gadget: Update pch_udc to use usb_endpoint_descriptor inside the struct usb_ep
  usb: gadget: Update s3c2410_udc to use usb_endpoint_descriptor inside the struct usb_ep
  usb: gadget: Update r8a66597-udc to use usb_endpoint_descriptor inside the struct usb_ep
  ...

5 years agoMerge remote-tracking branch 'santosh/v3.4/omap_mpuss_platform' into tmp
Felipe Balbi [Wed, 25 Apr 2012 11:30:42 +0000 (14:30 +0300)]
Merge remote-tracking branch 'santosh/v3.4/omap_mpuss_platform' into tmp

* santosh/v3.4/omap_mpuss_platform: (118 commits)
  ARM: OMAP5: PM Debug: Add wakeup_timer_seconds
  ARM: OMAP5: CPUidle: Add idle driver support.
  ARM: OMAP: powerdomain: Increment logic off counter.
  ARM: OMAP5: PM: Add L2 cache support
  ARM: OMAP5: PM: Add MPU OSWR mode in suspend
  ARM: OMAP5: PM: Add and CPU off mode support for hotplug CPU.
  ARM: OMAP: powerdomains: Add FORCE OFF transition functionality
  ARM: OMAP5: PM: Enable Mercury retention mode on CPU power domains.
  ARM: OMAP5: PM: Set MPUSS-EMIF clock-domain static dependency.
  ARM: OMAP5: powerdomain: Rename powerdomain44xx.c to powerdomain4xxx_5xxx.c
  ARM: OMAP5: PM: Add MPUSS CSWR support.
  ARM: OMAP5: PM: Consolidate OMAP4 and OMAP5 PM code
  ARM: OMAP5: PM: Rename OMAP4 re-usable PM files towards OMAP5 PM support.
  ARM: OMAP5: PM: Update SAR RAM base address
  ARM: OMAP5: EMIF driver for omap5evm
  ARM: OMAP5: Initialize arm_arch_timer devices
  ARM: OMAP5: GPIO: Implement workaround for Errata:i714
  gpio/omap: add support for OMAP5 gpio banks
  ARM: OMAP5: dma: Add support for omap5 dma.
  ARM: OMAP5: board: Initialise the mux framework with omap5 evm board data
  ...

5 years agousb: dwc3: ep0: implement support for Set Isoch Delay request
Felipe Balbi [Wed, 25 Apr 2012 07:45:05 +0000 (10:45 +0300)]
usb: dwc3: ep0: implement support for Set Isoch Delay request

This is basically a noop for DWC3. We don't have
to do anything. Basically we test if the request
parameters are correct, cache the Isochronous
Delay and return success.

Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agousb: dwc3: gadget: increase setup buffer size
Felipe Balbi [Wed, 25 Apr 2012 11:13:09 +0000 (14:13 +0300)]
usb: dwc3: gadget: increase setup buffer size

We want to re-use that buffer for other USB
requests, so let's increase it to biggest
wMaxPacketSize for ep0 so it works for everything
we have in mind.

Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agoARM: OMAP5: PM Debug: Add wakeup_timer_seconds
Vishwanath BS [Sat, 12 Nov 2011 11:31:17 +0000 (17:01 +0530)]
ARM: OMAP5: PM Debug: Add wakeup_timer_seconds

Add wakeup_timer_seconds to wake up from suspend.

Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
5 years agoARM: OMAP5: CPUidle: Add idle driver support.
Santosh Shilimkar [Sat, 21 Apr 2012 11:01:41 +0000 (16:31 +0530)]
ARM: OMAP5: CPUidle: Add idle driver support.

Add OMAP5 CPUidle support. Unlike OMAP4, on OMAP5 devices, MPUSS
CSWR (Close Switch Retention) power states can be achieved
with respective power states on CPU0 and CPU1 power domain. One key
difference though is, both CPU's power domain transition would happen
only when both CPU issue WFI with targeted power state programmed.
Till that point of time either CPU will remain in WFI and wait for
other CPU to hit WFI to do power domain transition.

CPU OFF and MPUSS OSWR power states support needs co-ordination
for the C-state entry and exit on both CPU's. This is implemented
using the couple idle infrastructure. CPU1 needs to be kept under
force OFF so that it remains immune to CPU0 wakeup events.

OMAP5 CPUidle C-states table:
        C1 - CPU0 ON + CPU1 ON + MPUSS ON
        C2 - CPU0 CSWR + CPU1 CSWR + MPUSS CSWR
        C3 - CPU0 OFF + CPU1 Force OFF + MPUSS OSWR

The OMAP5 idle driver is based on OMAP4 CPUidle driver implementation.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
5 years agoARM: OMAP: powerdomain: Increment logic off counter.
Axel Haslam [Tue, 21 Jun 2011 02:14:26 +0000 (21:14 -0500)]
ARM: OMAP: powerdomain: Increment logic off counter.

If pwrdm was set to logic off, and it achieved
retention, increment logic off counter.

Signed-off-by: Axel Haslam <axelhaslam@ti.com>
5 years agoARM: OMAP5: PM: Add L2 cache support
Santosh Shilimkar [Thu, 12 Apr 2012 11:50:51 +0000 (17:20 +0530)]
ARM: OMAP5: PM: Add L2 cache support

When the entire MPUSS cluster is powered down, L2 cache looses it's content
and hence while targetting such a state, l2 cache needs to be flushed.

Add the necessary support in the low power code support and update the
SAR RAM layout used for it.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
5 years agoARM: OMAP5: PM: Add MPU OSWR mode in suspend
Santosh Shilimkar [Thu, 12 Apr 2012 11:49:23 +0000 (17:19 +0530)]
ARM: OMAP5: PM: Add MPU OSWR mode in suspend

In MPUSS OSWR, entire CPU cluster is powered down except L2 cache memory.
For MPUSS OSWR state, both CPU's needs to be in OFF/FORCE OFF state.

ARM common kernel secondary boot path used by cpu hotplug seems to have
an issue around an integrated L2 cache handling.
Till that is being fixed, use cpu_resume() path.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
5 years agoARM: OMAP5: PM: Add and CPU off mode support for hotplug CPU.
Santosh Shilimkar [Thu, 12 Apr 2012 11:46:24 +0000 (17:16 +0530)]
ARM: OMAP5: PM: Add and CPU off mode support for hotplug CPU.

On OMAP5 and onwards, force off mode is introduced on
non-boot CPU power domains to take care of Cortex-A15 based design
limitation. All the CPUs in a cluster transitions to low power state
together and not individually with wfi. Force off mode fix that
limitation and let CPU individually hit OFF mode.

The changes include:
- OMAP5 CPU off mode update.
- Programming CPU1 to focre off mode in cpu-hotplug path
- Update CPU hotplug path to re-init the CPU power domain.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
5 years agousb: dwc3: ep0: add a default case for SetFeature command
Gerard Cauvy [Fri, 16 Mar 2012 14:20:10 +0000 (16:20 +0200)]
usb: dwc3: ep0: add a default case for SetFeature command

Without this default case returning an error,
thus replying with a stall, we would fail
USB30CV TD 9.11 Bad Feature test case.

Cc: stable@vger.kernel.org
Signed-off-by: Gerard Cauvy <g-cauvy1@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agousb: dwc3: ep0: implement Set SEL support
Felipe Balbi [Tue, 24 Apr 2012 13:19:49 +0000 (16:19 +0300)]
usb: dwc3: ep0: implement Set SEL support

This patch implements Set SEL Standard Request
support for dwc3 driver. It needs to issue a command
to the controller passing the timing we received on
the data phase of the Set SEL request.

Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agousb: dwc3: gadget: implement Global Command support
Felipe Balbi [Tue, 24 Apr 2012 13:19:11 +0000 (16:19 +0300)]
usb: dwc3: gadget: implement Global Command support

This will be used by the ep0 layer for implementing
Set SEL Standard Request.

Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agousb: ch9: define Set SEL and Set Isoch Delay macros
Felipe Balbi [Tue, 24 Apr 2012 12:44:51 +0000 (15:44 +0300)]
usb: ch9: define Set SEL and Set Isoch Delay macros

These are new requests introduced by USB 3.0
Specification. Gadget controllers should implement
them.

Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agousb: dwc3: core: split host address space
Ido Shayevitz [Tue, 24 Apr 2012 11:18:39 +0000 (14:18 +0300)]
usb: dwc3: core: split host address space

This fix prevents a problem with dwc3 and host mode where
we were requesting the entire memory region in dwc3/core.c,
thus preventing xhci-plat from ever ioremapping its own address space.

Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agousb: dwc3: omap: add dwc3_omap_readl/writel functions
Ido Shayevitz [Tue, 24 Apr 2012 11:18:38 +0000 (14:18 +0300)]
usb: dwc3: omap: add dwc3_omap_readl/writel functions

We separate between dwc3-omap helper functions to dwc3-core helper
functions. This will allow us to change the helper functions
implementation according to each module need.

Signed-off-by: Ido Shayevitz <idos@codeaurora.org>
Signed-off-by: Felipe Balbi <balbi@ti.com>
5 years agousb: dwc3: ep0: add LPM handling
Sebastian Andrzej Siewior [Tue, 13 Sep 2011 15:54:39 +0000 (17:54 +0200)]
usb: dwc3: ep0: add LPM handling

On device loading the driver enables LPM and the acceptance of U1 and U2
states. The [Set|Clear]Feature requests for "U1/U2" are forwarded
directly to the hardware and allow / forbid the initiation of the low
power links.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
6 years agoARM: OMAP: powerdomains: Add FORCE OFF transition functionality
Santosh Shilimkar [Thu, 12 Apr 2012 11:44:32 +0000 (17:14 +0530)]
ARM: OMAP: powerdomains: Add FORCE OFF transition functionality

In OMAP5 and onwards, FORCE OFF mode is introduced on CPU power domains.

Supported only on CPU power domains to take care of Cortex-A15 based
design limitation. All the CPUs in a cluster transitions to low power
state together and not individually with wfi. Force OFF mode fix that
limitation and let CPU individually hit OFF mode.

While at this move the multi-line comments in power domain header file
above the respective flags.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: PM: Enable Mercury retention mode on CPU power domains.
Santosh Shilimkar [Thu, 12 Apr 2012 11:31:52 +0000 (17:01 +0530)]
ARM: OMAP5: PM: Enable Mercury retention mode on CPU power domains.

In addition to the standard power-management technique, the OMAP5 MPU subsystem
also employs an SR3-APG (mercury) power-management technology to reduce leakage.

It allows for full logic and memories retention on MPU_C0 and MPU_C1 and
is controlled by the PRCM_MPU.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: PM: Set MPUSS-EMIF clock-domain static dependency.
Santosh Shilimkar [Thu, 12 Apr 2012 11:29:31 +0000 (16:59 +0530)]
ARM: OMAP5: PM: Set MPUSS-EMIF clock-domain static dependency.

With EMIF clock-domain put under hardware supervised control, memory corruption
and untraceable crashes are observed on OMAP5. This indicates that memory read/writes
are not working with EMIF being allowed to idle.

Till issue gets root-caused, the recommendation is to set MPUSS static
dependency towards EMIF clock-domain to avoid issues.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: powerdomain: Rename powerdomain44xx.c to powerdomain4xxx_5xxx.c
Santosh Shilimkar [Thu, 12 Apr 2012 11:27:42 +0000 (16:57 +0530)]
ARM: OMAP5: powerdomain: Rename powerdomain44xx.c to powerdomain4xxx_5xxx.c

Rename OMAP4 powerdomain44xx.c to powerdomain4xxx_5xxx.c since all the
OMAP4 power domain APIs can be re-used.

Register a seperate 'pwrdm_ops' for OMAP5 so that additional power
domain functionality can be added.

This patch is the place holder to add OMAP5 specific FORCE OFF
power domain functionality.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: PM: Add MPUSS CSWR support.
Santosh Shilimkar [Thu, 12 Apr 2012 11:25:10 +0000 (16:55 +0530)]
ARM: OMAP5: PM: Add MPUSS CSWR support.

Program CPU0, CPU1 and MPUSS powerdomians to Close Switch Retention. Unlike
OMAP4 devices, on OMAP5 based devices, MPUSS CSWR can be achieved with CPU
power domains in CSWR. On OMAP4 based devices, CPU CSWR was not supported
in hardware and hence CPU powerdomain needs to be in off state to achieve
MPUSS CSWR.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: PM: Consolidate OMAP4 and OMAP5 PM code
Santosh Shilimkar [Thu, 12 Apr 2012 11:21:47 +0000 (16:51 +0530)]
ARM: OMAP5: PM: Consolidate OMAP4 and OMAP5 PM code

OMAP5 has backward compatible PRCM block and it's programming model is
mostly similar. Consolidate the OMAP4 PM code so that it can be re-used on
OMAP5 deviecs.

No functional change.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: PM: Rename OMAP4 re-usable PM files towards OMAP5 PM support.
Santosh Shilimkar [Thu, 12 Apr 2012 11:04:53 +0000 (16:34 +0530)]
ARM: OMAP5: PM: Rename OMAP4 re-usable PM files towards OMAP5 PM support.

OMAP4 and OMAP5 MPUSS and PRCM IPs are very similar. This patch renames the
OMAP4 PM files so that OMAP5 PM code can co-exist with OMAP4 PM code.

No functional change.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: PM: Update SAR RAM base address
Santosh Shilimkar [Thu, 12 Apr 2012 10:54:51 +0000 (16:24 +0530)]
ARM: OMAP5: PM: Update SAR RAM base address

SAR RAM is used for OMAP power management as a persistent memory.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: OMAP5: EMIF driver for omap5evm
Senthilvadivu Guruswamy [Wed, 11 Apr 2012 13:28:11 +0000 (18:58 +0530)]
ARM: OMAP5: EMIF driver for omap5evm

Enable emif driver registration from omap5evm board file.

Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
6 years agoARM: OMAP5: Initialize arm_arch_timer devices
Santosh Shilimkar [Tue, 10 Apr 2012 07:09:29 +0000 (12:39 +0530)]
ARM: OMAP5: Initialize arm_arch_timer devices

Add ARM non-secure physical timer device and call the
arch_timer_register() to initialize the devices.

The clock to the local timers and counter is kept constant at 6.144 MHz. The
ratio register needs to be programmed based on the sysclk or 32768 Hz when the
sysclk is cut.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP5: GPIO: Implement workaround for Errata:i714
R Sricharan [Wed, 11 Apr 2012 12:49:25 +0000 (18:19 +0530)]
ARM: OMAP5: GPIO: Implement workaround for Errata:i714

GPIO IRQ not generated after MPU Idle if all the bits in DSP's IRQSTATUS2
register is not cleared. There is already similar workaround present in
_clear_gpio_irqbank() which just clears the gpio_mask. Extend this to
clear all the bits.

DESCRIPTION:
After the GPIO is configured in smart-idle (or smart-idle with wake-up)
and the system goes into MPU inactive mode (idle), the GPIO does not
generate any IRQ again if any of the register bits of both interrupt line
raw status registers(GPIO_IRQSTATUS_RAW_0 or GPIO_IRQSTATUS_RAW_1) is set.
In the case of a GPIO configured in smart-idle wake-up mode
(GPIO_SYSCONFIG[4:3]=0x3), the wake-up associated to the GPIO IRQ event
will not even occur.

WORKAROUND:
The workaround is to clear GPIO_IRQSTATUS_y (all the bits) when the
corresponding interrupt line (most of the time the DSP, that is, 2nd
interrupt line) is not used, at each time GPIO_IRQSTATUS_x is cleared.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
6 years agogpio/omap: add support for OMAP5 gpio banks
sricharan [Thu, 3 Nov 2011 04:30:12 +0000 (10:00 +0530)]
gpio/omap: add support for OMAP5 gpio banks

OMAP5 has two additional gpio banks 7, 8. Accordingly changing
the maximum number of GPIO lines supported to 256.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
6 years agoARM: OMAP5: dma: Add support for omap5 dma.
R Sricharan [Mon, 28 Mar 2011 11:42:51 +0000 (17:12 +0530)]
ARM: OMAP5: dma: Add support for omap5 dma.

The OMAP5 soc has the same dma IP as omap4.
So Add omap5 support in to the driver.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
6 years agoARM: OMAP5: board: Initialise the mux framework with omap5 evm board data
R Sricharan [Thu, 12 Apr 2012 08:09:31 +0000 (13:39 +0530)]
ARM: OMAP5: board: Initialise the mux framework with omap5 evm board data

Pass on the mux data from the board file.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP5: mux: Add the pin mux data for OMAP5 SOC.
Benoit Cousson [Mon, 27 Feb 2012 12:44:38 +0000 (18:14 +0530)]
ARM: OMAP5: mux: Add the pin mux data for OMAP5 SOC.

Adding the full data for OMAP5 socs and
registering it to the framework.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Tested-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP5: l3: Add l3 error handler support for omap5.
R Sricharan [Fri, 4 Nov 2011 10:22:59 +0000 (15:52 +0530)]
ARM: OMAP5: l3: Add l3 error handler support for omap5.

The l3 interconnect ip is same for OMAP4 and OMAP5.
So reuse the l3 error handler error code for OMAP5
as well. Also a few targets has been newly added for
OMAP5. So updating the driver for that here.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP: zebu: Add zebu specific workarounds.
R Sricharan [Thu, 19 Apr 2012 06:10:01 +0000 (11:40 +0530)]
ARM: OMAP: zebu: Add zebu specific workarounds.

Adding some zebu specific changes to make zebu boot faster.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: GIC: Fix data corruption bug 4668
Santosh Shilimkar [Fri, 6 Apr 2012 12:31:04 +0000 (18:01 +0530)]
ARM: GIC: Fix data corruption bug 4668

Interim code for Cortex-A15 prototype errata in OMAP5 and that such
code will be updated and therefore is not recommended to be upstreamed
into the main branch of the relevant open source project.

Description:
Hang condition or data corruption possible when GIC writes hazard against
older load requests.

Workaround:
Insert a DSB immediately prior to the GIC write and immediately following the
GIC write, which will ensure that there is no hazard established between the
GIC write and an older load.  This is required only for the CPU doing the GIC
access.  Other cpus can continue doing transactions without issue.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
6 years agoARM: Cortex-A15: Fix for errata 761171
R Sricharan [Fri, 6 Apr 2012 11:53:28 +0000 (17:23 +0530)]
ARM: Cortex-A15: Fix for errata 761171

Interim code for Cortex-A15 prototype errata in OMAP5 and such code will be
updated and therefore is not recommended to be upstreamed into the
main branch of the relevant open source project.

Description:
As per the erratum streaming write that will not allocate in L2 could
lead to data corruption.

conditions:
1. ACTLR[28:27] (Write streaming no-allocate threshold) is set to a
   value other than b11 (disabled)
2. Enough incrementing address stores have been executed for the processor
   to enter its no-allocate streaming mode
3. A 64 byte streaming write is sent to the L2 cache, assembled from a
   series of stores
4. The write is unable to execute in the L2 pipeline in back to back cycles
   due to bank conflicts

   As a result of the above sequence write to AXI may have incorrect data,
   resulting in data corruption.

WA:
  Disable store streaming that does not allocate in any cache by setting
  ACTLR[28:27] (Write streaming no-allocate threshold) to b11 (disabled).

Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: A15: Set secure l2 cache registers.
R Sricharan [Fri, 6 Apr 2012 11:47:02 +0000 (17:17 +0530)]
ARM: A15: Set secure l2 cache registers.

The L2 ACTLR is writable in secure mode only. Set this
to 0x118 to get the optimal performance.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: mm: Optimise the v7 Dcache flush all routine.
Marquette Anderson [Thu, 17 Nov 2011 04:19:58 +0000 (09:49 +0530)]
ARM: mm: Optimise the v7 Dcache flush all routine.

The current algorithm flushes using the SET and WAY, where it iterates over
a given SET in all the WAYS and to the next SET. Change this so that every
successive flush address will go to in to the alternate EMIF(1/2), there by
utilising the full bandwidth. Also iterating all the SETS of a given WAY,
and then switching to the next way can reduce the possibility of frequent
change in the row bits during successive transactions of the DDR memory.
This will help in reducing the ROW open/close time.

Signed-off-by: Marquette Anderson <m-anderson13@ti.com>
6 years agoARM: OMAP5: Add SMP support.
Santosh Shilimkar [Mon, 19 Mar 2012 13:59:41 +0000 (19:29 +0530)]
ARM: OMAP5: Add SMP support.

Add OMAP5 SMP boot support using OMAP4 SMP code. The relevant code paths
are runtime checked using omap_id

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP5: Add the WakeupGen IP updates.
Santosh Shilimkar [Mon, 19 Mar 2012 13:54:35 +0000 (19:24 +0530)]
ARM: OMAP5: Add the WakeupGen IP updates.

OMAP4 and OMAP5 share same WakeupGen IP with below few udpates on OMAP5.
- Additional 32 interrupt support is added w.r.t OMAP4 design.
- The AUX CORE boot registers are now made accessible from non-secure SW.
- SAR offset are changed and PTMSYNC* registers are removed from SAR.

Patch updates the WakeupGen code accordingly.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP5: Add the build support
Santosh Shilimkar [Tue, 3 Apr 2012 09:24:58 +0000 (14:54 +0530)]
ARM: OMAP5: Add the build support

Adding the build support required for OMAP5 soc
in to omap2+ config.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP5: Add board file for OMAP5 evm.
Santosh Shilimkar [Tue, 3 Apr 2012 09:23:19 +0000 (14:53 +0530)]
ARM: OMAP5: Add board file for OMAP5 evm.

Adding the board file data for OMAP5 evm and
include it in to the build. This calls the
minimal initialisation of serial driver.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
6 years agoARM: OMAP5: gic: Update the base address.
Santosh Shilimkar [Tue, 3 Apr 2012 09:17:31 +0000 (14:47 +0530)]
ARM: OMAP5: gic: Update the base address.

OMAP5 soc with cortex-a15 has the gic ip fully backward
compatible with that of OMAP4 cortex a9.
So just the update the base address.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>