descriptiondf6c8245f7ca4531ef8323e402063294bd
last changeThu, 19 Jul 2012 00:38:42 +0000 (02:38 +0200)
shortlog
2012-07-19 Roy Splietdrm/nouveau/pm: Fix GDDR3 thinkos, add RON pull master
2012-07-19 Roy Splietdrm/nouveau/pm: Allow for reclocking all-but-mem
2012-07-19 Roy Splietdrm/nva3/pm: Reclock engines using HWSQ
2012-07-19 Roy Splietdrm/nva3/pm: Add several unknown writes to memory reclo...
2012-07-19 Roy Splietdrm/nouveau: Add 'user' irq handler
2012-07-19 Martin Peresdrm/nv50: experimental dvfs implementation
2012-07-19 Martin Peresdrm/nv40: initial work towards the perfmon architecture
2012-07-19 Martin Peresdrm/nv50/gr: make ctxprog decide at run time to disable...
2012-07-19 Roy Splietdrm/nouveau/pm: Introduce locking to avoid concomitant...
2012-07-19 Martin Peresdrm/nv50/pm/mem: introduce a little delay when upclocki...
2012-07-19 Martin Peresdrm/nv50/pm: bail out if the hwsq script is bigger...
2012-07-19 Martin Peresdrm/nv50/pm: generate more PFB/PBUS registers while...
2012-07-19 Roy Splietdrm/nv50/pm: Fix last timing register in NVA3+, fix...
2012-04-13 Roy Splietdrm/nouveau/pm: Prepare for more GDDR5 MR values
2012-04-13 Henrik Rydbergnouveau: Set special lane map for the right chipset
2012-04-13 Ben Skeggsdrm/nve0/graph: bump hub2gpc buffer size
...
tags
6 years ago to-linus-staging-1
heads
2 years ago master_new
2 years ago thermal
3 years ago render_nodes
3 years ago master
3 years ago nouveau-compat
4 years ago old_master
4 years ago outdated_safe_reclock
4 years ago dvfs