gstreamer-omap:libdrm.git
5 years agoconfigure: bump version for release 2.4.37 libdrm-2.4.37
Ben Widawsky [Fri, 29 Jun 2012 18:08:05 +0000 (11:08 -0700)]
configure: bump version for release

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agointel/context: create/destroy implementation
Ben Widawsky [Fri, 13 Jan 2012 19:31:52 +0000 (11:31 -0800)]
intel/context: create/destroy implementation

Add relevant code to set up minimal state and call the appropriate
kernel IOCTLs.

This was missed in the previous cherry-picking for 2.3.36.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agomodetest: Dump bit field names
Kristian Høgsberg [Thu, 28 Jun 2012 14:48:31 +0000 (10:48 -0400)]
modetest: Dump bit field names

5 years agointel/decode: fix the reference file for 2.4.36 libdrm-2.4.36
Ben Widawsky [Wed, 27 Jun 2012 17:10:53 +0000 (10:10 -0700)]
intel/decode: fix the reference file for

I mistakenly "fixed" a bad decode with

commit 7d0a1d5ebbe2c6aecd96eef94b0af038858a0178
Author: Ben Widawsky <ben@bwidawsk.net>
Date:   Sun Jun 24 20:35:57 2012 -0700

    intel/decode: VERTEX_ELEMENT_STATE, 1 means valid

However the actual fix is just to update the reference file, and
include GEN7 in the decode.

Props to Eric Anholt for putting the test in distcheck, or else I
wouldn't have caught this.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoRevert "intel/decode: VERTEX_ELEMENT_STATE, 1 means valid"
Ben Widawsky [Wed, 27 Jun 2012 17:19:49 +0000 (10:19 -0700)]
Revert "intel/decode: VERTEX_ELEMENT_STATE, 1 means valid"

This reverts commit 7d0a1d5ebbe2c6aecd96eef94b0af038858a0178.

The actual fix

5 years agointel: add decoding of MI_SET_CONTEXT
Ben Widawsky [Sun, 27 May 2012 23:10:51 +0000 (16:10 -0700)]
intel: add decoding of MI_SET_CONTEXT

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/context: new execbuf interface for contexts
Ben Widawsky [Mon, 19 Mar 2012 01:28:28 +0000 (18:28 -0700)]
intel/context: new execbuf interface for contexts

To support this we extract the common execbuf2 functionality to be
called with, or without contexts.

The context'd execbuf does not support some of the dri1 stuff.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/context: Add drm_intel_context type
Ben Widawsky [Fri, 13 Jan 2012 19:31:31 +0000 (11:31 -0800)]
intel/context: Add drm_intel_context type

Add an opaque type representing a HW context.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel: updated header for contexts
Ben Widawsky [Wed, 27 Jun 2012 16:52:42 +0000 (09:52 -0700)]
intel: updated header for contexts

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-By: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/decode: VERTEX_ELEMENT_STATE, 1 means valid
Ben Widawsky [Mon, 25 Jun 2012 03:35:57 +0000 (20:35 -0700)]
intel/decode: VERTEX_ELEMENT_STATE, 1 means valid

The logic seemed to be inverse to me.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agointel/decode: add sampler state pointers for [HD]S
Ben Widawsky [Mon, 25 Jun 2012 04:53:50 +0000 (21:53 -0700)]
intel/decode: add sampler state pointers for [HD]S

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agointel: wait render timeout implementation
Ben Widawsky [Tue, 5 Jun 2012 18:30:48 +0000 (11:30 -0700)]
intel: wait render timeout implementation

int drm_intel_gem_bo_wait(drm_intel_bo *bo, uint64_t timeout_ns)

This should bump the libdrm version. We're waiting for context support
so we can do both features in one bump.

v2: don't return remaining timeout amount
use get param and fallback for older kernels

v3: only doing getparam at init
prototypes now have a signed input value

v4: update comments
fall back to correct polling behavior with new userspace and old kernel

v5: since the drmIoctl patch was not well received, return appropriate
values in this function instead. As Daniel pointed out, the polling
case (timeout == 0) should also return -ETIME.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agointel: Add IVB PUSH_CONSTANT decodes
Ben Widawsky [Mon, 25 Jun 2012 00:12:24 +0000 (17:12 -0700)]
intel: Add IVB PUSH_CONSTANT decodes

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoradeon/surface: free version after using it.
Dave Airlie [Sun, 17 Jun 2012 08:18:03 +0000 (09:18 +0100)]
radeon/surface: free version after using it.

fixes leak in valgrind.

Signed-off-by: Dave Airlie <airlied@redhat.com>
5 years agoradeon: force 1D array mode for z/stencil surface
Jerome Glisse [Tue, 12 Jun 2012 22:09:55 +0000 (18:09 -0400)]
radeon: force 1D array mode for z/stencil surface

On r6xx or evergreen z/stencil surface don't support linear or
linear aligned surface, force 1D tiled mode for those.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agoradeon: enabled 2D tiling for evergreen only on fixed kernel
Jerome Glisse [Mon, 11 Jun 2012 19:04:45 +0000 (15:04 -0400)]
radeon: enabled 2D tiling for evergreen only on fixed kernel

Due to a kernel bug, enabled 2D tiling for evergreen only on
newer fixed kernel.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agoradeon: always properly initialize stencil_offset field
Jerome Glisse [Mon, 11 Jun 2012 19:01:12 +0000 (15:01 -0400)]
radeon: always properly initialize stencil_offset field

Reported-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agonouveau: silence some remaining valgrind warnings
Marcin Slusarz [Sat, 9 Jun 2012 18:56:37 +0000 (20:56 +0200)]
nouveau: silence some remaining valgrind warnings

Valgrind can't understand some of the fields passed to ioctls are overwritten
by kernel, so we need to initialize them. Almost all of our ioctl wrappers
already do it and the cost of remaining 3 is very small.

Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
5 years agomodetest: support plane properties
Rob Clark [Tue, 5 Jun 2012 17:28:47 +0000 (12:28 -0500)]
modetest: support plane properties

Add support to display plane properties.

Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
5 years agomodetest: support bitmask properties
Rob Clark [Tue, 5 Jun 2012 17:28:38 +0000 (12:28 -0500)]
modetest: support bitmask properties

Add support to display bitmask properties.

Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
5 years agoAdd support for bitmask properties
Rob Clark [Tue, 5 Jun 2012 17:28:22 +0000 (12:28 -0500)]
Add support for bitmask properties

A bitmask property is similar to an enum.  The enum value is a bit
position (0-63), and valid property values consist of a mask of
zero or more of (1 << enum_val[n]).

Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
5 years agomodetest: print CRTC properties
Paulo Zanoni [Tue, 15 May 2012 21:38:29 +0000 (18:38 -0300)]
modetest: print CRTC properties

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob@ti.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
5 years agoAdd support for generic object properties IOCTLs
Paulo Zanoni [Tue, 15 May 2012 21:38:28 +0000 (18:38 -0300)]
Add support for generic object properties IOCTLs

New library calls:
- drmModeObjectGetProperties
- drmModeFreeObjectProperties
- drmModeObjectSetProperties

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Rob Clark <rob@ti.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
5 years agoautogen.sh: Restore passing --enable-maintainer-mode to configure.
Michel Dänzer [Fri, 8 Jun 2012 13:23:46 +0000 (15:23 +0200)]
autogen.sh: Restore passing --enable-maintainer-mode to configure.

Otherwise build system files aren't automagically regenerated after updating
from Git.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
5 years agoconfigure: bump version for release 2.4.35 libdrm-2.4.35
Alex Deucher [Thu, 7 Jun 2012 14:45:55 +0000 (10:45 -0400)]
configure: bump version for release

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoradeon: fall back to 1D tiling only with broken kernels
Alex Deucher [Wed, 6 Jun 2012 13:12:37 +0000 (09:12 -0400)]
radeon: fall back to 1D tiling only with broken kernels

Certain cards report the the wrong bank setup which causes
surface init to fail in the ddx and leads to no accel.
If we hit an invalid tiling parameter, just set a default
value and disable 2D tiling.

Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=43448

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agointel: wait render header updates
Ben Widawsky [Tue, 5 Jun 2012 18:30:08 +0000 (11:30 -0700)]
intel: wait render header updates

make headers_install in kernel. Copy to here.

v2: signed ns_timeout

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agointel: sanitize i915_drm.h
Ben Widawsky [Tue, 5 Jun 2012 18:28:01 +0000 (11:28 -0700)]
intel: sanitize i915_drm.h

run make headers_isntall on d-i-n, copy to here

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
5 years agoradeon: add new pci ids
Alex Deucher [Tue, 5 Jun 2012 14:07:15 +0000 (10:07 -0400)]
radeon: add new pci ids

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoradeon: Add Southern Islands PCI IDs.
Michel Dänzer [Wed, 16 May 2012 16:49:18 +0000 (18:49 +0200)]
radeon: Add Southern Islands PCI IDs.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
5 years agolibdrm: add exynos drm support
Inki Dae [Fri, 4 May 2012 10:13:14 +0000 (19:13 +0900)]
libdrm: add exynos drm support

this patch adds libdrm_exynos helper layer that inclues some intefaces
for exynos specific gem and virtual display driver and also adds exynos
module name to modtest and vbltest.

Changelog v2:
- fixed exynos broken ioctl.
  the pointer of uint64_t *edid should be removed.
- removed unnecessary definitions.
- added drm prime interfaces.
  this feature is used to share a buffer between drivers or memory managers
  and for this, please, refer to below links:
http://www.mjmwired.net/kernel/Documentation/dma-buf-sharing.txt
http://lwn.net/Articles/488664/

this patch is based on a link below:
git://anongit.freedesktop.org/mesa/drm
commit id: d72a44c7c4f5eea9c1e5bb0c36cb9e0224b9ca22

Reviewed-by: Rob Clark <rob@ti.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Rob Clark <rob@ti.com>
5 years agoconfigure: Bump version for 2.4.34.
Paul Berry [Mon, 7 May 2012 20:15:12 +0000 (13:15 -0700)]
configure: Bump version for 2.4.34.

5 years agointel: Add the ability to supply annotations for .aub files.
Paul Berry [Fri, 4 May 2012 19:41:00 +0000 (12:41 -0700)]
intel: Add the ability to supply annotations for .aub files.

This patch adds a new function,
drm_intel_bufmgr_gem_set_aub_annotations(), which can be used to
annotate the type and subtype of data stored in various sections of
each buffer.  This data is used to populate type and subtype fields
when generating the .aub file, which improves the ability of later
debugging tools to analyze the contents of the .aub file.

If drm_intel_bufmgr_gem_set_aub_annotations() is not called, then we
fall back to the old set of annotations (annotate the portion of the
batchbuffer that is executed as AUB_TRACE_TYPE_BATCH, and everything
else as AUB_TRACE_TYPE_NOTYPE).

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoradeon: Add new R600 PCI ids for surface manager
Anisse Astier [Thu, 10 May 2012 15:56:14 +0000 (17:56 +0200)]
radeon: Add new R600 PCI ids for surface manager

This is the same list of PCI ids added by Alex Deucher in xf86-video-ati commit
aacbd629b02cbee3f9e6a0ee452b4e3f21376bd3.

This is needed since the addition of the surface allocator helper in
commit c51f7f0e460dcadb9f1a56ecf1615810877c33c8 ; it needs to differentiate
pre and post-R600 GPUs.
Therefore we should maintain another PCI id list.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=48138
Signed-off-by: Anisse Astier <anisse@astier.eu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agomodetest: print more about our properties
Paulo Zanoni [Sat, 21 Apr 2012 20:51:53 +0000 (17:51 -0300)]
modetest: print more about our properties

In the future we'll have more than just connector properties, so create
a dump_prop function that can handle any property (instead of the
current dump_props function that only handles connector properties).

Also, make this function print a lot more information about the existing
properties.

Also change the printed indentation of the modes to make the output more
readable.

The previous function dump_props also segfaulted when we didn't have
enought permissions. The new function does not segfault in this case (by
checking for the return value of drmModeGetProperty).

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agomodetest: call drmModeFreePlaneResources
Paulo Zanoni [Sat, 21 Apr 2012 20:51:52 +0000 (17:51 -0300)]
modetest: call drmModeFreePlaneResources

24 (16 direct, 8 indirect) bytes in 1 blocks are definitely lost in loss record 2 of 7
   at 0x402994D: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
   by 0x4A25950: drmMalloc (xf86drm.c:147)
   by 0x4A2E26D: drmModeGetPlaneResources (xf86drmMode.c:951)
   by 0x4025FF: dump_planes (modetest.c:276)
   by 0x4052AF: main (modetest.c:1120)

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agomodetest: fix drmModeGetConnector memory leak
Paulo Zanoni [Sat, 21 Apr 2012 20:51:51 +0000 (17:51 -0300)]
modetest: fix drmModeGetConnector memory leak

Don't "continue" without freeing the connector.

192 bytes in 6 blocks are indirectly lost in loss record 6 of 12
   at 0x4C2779D: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so)
   by 0x4E30DD8: drmMalloc (xf86drm.c:147)
   by 0x4E35024: drmAllocCpy (xf86drmMode.c:73)
   by 0x4E35D69: drmModeGetConnector (xf86drmMode.c:507)
   by 0x402F22: dump_connectors (modetest.c:181)
   by 0x40261B: main (modetest.c:801)

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agomodetest: fix some compiler warnings
Paulo Zanoni [Sat, 21 Apr 2012 20:51:50 +0000 (17:51 -0300)]
modetest: fix some compiler warnings

Use unsigned int instead of int:
- modetest.c:90:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:98:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:118:1: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:286:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:303:17: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:694:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
- modetest.c:1088:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]

The 'fd' variable is global, we don't need to pass it as an argument:
- modetest.c:998:40: warning: unused parameter ‘fd’ [-Wunused-parameter]

We don't use the 'modeset' variable:
- modetest.c:1025:8: warning: variable ‘modeset’ set but not used [-Wunused-but-set-variable]

V2: rebase, clear some more warnings

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agonouveau: fix channel closing
Marcin Slusarz [Tue, 1 May 2012 21:24:45 +0000 (23:24 +0200)]
nouveau: fix channel closing

Restore code lost in libdrm_nouveau rewrite.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agonouveau: expose notifier handle on nvc0 as well
Christoph Bumiller [Thu, 19 Apr 2012 18:03:39 +0000 (20:03 +0200)]
nouveau: expose notifier handle on nvc0 as well

Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agonouveau: remove unnecessary EAGAIN loops
Marcin Slusarz [Sun, 22 Apr 2012 22:31:48 +0000 (00:31 +0200)]
nouveau: remove unnecessary EAGAIN loops

drmCommandWrite / drmCommandWriteRead already loop on EAGAIN.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agonouveau: init nvc0 channel alloc req structure fully
Ben Skeggs [Mon, 16 Apr 2012 22:35:43 +0000 (08:35 +1000)]
nouveau: init nvc0 channel alloc req structure fully

Kernel rejects ~0 handles, even though they're not used on NVC0.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
5 years agonouveau: pull in major libdrm rewrite
Ben Skeggs [Fri, 9 Dec 2011 06:11:06 +0000 (16:11 +1000)]
nouveau: pull in major libdrm rewrite

Redesigned primarily to allow us to better take advantage of BO's having
fixed GPU virtual addresses on GeForce 8 and up, and to reduce the overhead
of handling relocations on earlier chipsets.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
5 years agolists: add nicer+unsafe foreach, and list join macros
Ben Skeggs [Sat, 17 Dec 2011 13:37:20 +0000 (23:37 +1000)]
lists: add nicer+unsafe foreach, and list join macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
5 years agoomap: add dmabuf support
Rob Clark [Wed, 11 Apr 2012 14:51:36 +0000 (09:51 -0500)]
omap: add dmabuf support

Signed-off-by: Rob Clark <rob@ti.com>
5 years agolibdrm: update drm headers from kernel for prime/dmabuf
Rob Clark [Wed, 11 Apr 2012 14:44:35 +0000 (09:44 -0500)]
libdrm: update drm headers from kernel for prime/dmabuf

Sync drm.h with from kernel headers for the new PRIME_HANDLE_TO_FD
and PRIME_FD_TO_HANDLE ioctls from Dave Airlie's "drm: base prime/
dma-buf support (v5)" kernel patch.

Signed-off-by: Rob Clark <rob@ti.com>
5 years agomodetest: fix typo
Rob Clark [Tue, 10 Apr 2012 15:23:50 +0000 (10:23 -0500)]
modetest: fix typo

Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rob Clark <rob@ti.com>
5 years agomodetest: add AR15/XR15 (RGB-1555) formats
Rob Clark [Mon, 2 Jan 2012 16:31:25 +0000 (10:31 -0600)]
modetest: add AR15/XR15 (RGB-1555) formats

Signed-off-by: Rob Clark <rob@ti.com>
5 years agomodetest: add YUV and multi-planar support
Rob Clark [Thu, 15 Dec 2011 04:24:14 +0000 (22:24 -0600)]
modetest: add YUV and multi-planar support

Signed-off-by: Rob Clark <rob@ti.com>
5 years agomodetest: add drm_plane support
Rob Clark [Thu, 15 Dec 2011 03:06:43 +0000 (21:06 -0600)]
modetest: add drm_plane support

Signed-off-by: Rob Clark <rob@ti.com>
5 years agoomap: fix compiler warning
Víctor Manuel Jáquez Leal [Mon, 2 Apr 2012 16:08:29 +0000 (18:08 +0200)]
omap: fix compiler warning

When compiling with linaro toolchain version 4.6.2 got this warning.

  CC     omap_drm.lo
omap_drm.c: In function 'omap_bo_new_impl':
omap_drm.c:139:6: warning: 'bo' may be used uninitialized in this function [-Wuninitialized]

This patch initialize bo to NULL avoiding the warning.

Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Signed-off-by: Rob Clark <rob@ti.com>
5 years agoomap: fix license header
Rob Clark [Tue, 3 Apr 2012 21:44:43 +0000 (16:44 -0500)]
omap: fix license header

In syncing with the corresponding kernel header, the wrong license
header was inadvertantly copied over.  The intention was for the
userspace headers to have a MIT license following the convention
of the rest of libdrm, xorg, etc.

Signed-off-by: Rob Clark <rob@ti.com>
5 years agointel/decode: decode MI_WAIT_FOR_EVENT
Daniel Vetter [Mon, 2 Apr 2012 11:08:09 +0000 (13:08 +0200)]
intel/decode: decode MI_WAIT_FOR_EVENT

... and add support to decode MI instructions with functions.

Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agointel: add Ivy Bridge GT2 server variant
Eugeni Dodonov [Fri, 30 Mar 2012 00:03:29 +0000 (21:03 -0300)]
intel: add Ivy Bridge GT2 server variant

We were missing this one and it is being used by Bromolow.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
5 years agoconfigure: Bump version for 2.4.33
Alex Deucher [Wed, 28 Mar 2012 21:17:36 +0000 (17:17 -0400)]
configure: Bump version for 2.4.33

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
5 years agoomap: add omapdrm support
Rob Clark [Wed, 28 Mar 2012 19:39:43 +0000 (14:39 -0500)]
omap: add omapdrm support

This adds libdrm_omap helper layer (as used by xf86-video-omap,
omapdrmtest, etc).

Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
[danvet: pushed for Rob, he doesn't yet have commit access.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agointel: Add some PCI IDs for Haswell.
Kenneth Graunke [Mon, 19 Mar 2012 20:55:19 +0000 (13:55 -0700)]
intel: Add some PCI IDs for Haswell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
5 years agoradeon: add TN surface support
Alex Deucher [Tue, 14 Feb 2012 16:32:17 +0000 (11:32 -0500)]
radeon: add TN surface support

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoconfigure: Bump version for 2.4.32.
Eric Anholt [Fri, 16 Mar 2012 23:11:10 +0000 (16:11 -0700)]
configure: Bump version for 2.4.32.

5 years agointel: Quiet two more valgrind complaints with recent changes.
Eric Anholt [Tue, 13 Mar 2012 23:49:53 +0000 (16:49 -0700)]
intel: Quiet two more valgrind complaints with recent changes.

These are more cases where valgrind doesn't understand what gets read
or written by our ioctls.

5 years agointel: Add per-dword decode of gen7 3DPRIMITIVE.
Eric Anholt [Fri, 2 Mar 2012 18:27:55 +0000 (10:27 -0800)]
intel: Add per-dword decode of gen7 3DPRIMITIVE.

5 years agointel: Move the gen4-6 3DPRIMITIVE handling out of the switch statement.
Eric Anholt [Fri, 2 Mar 2012 18:18:51 +0000 (10:18 -0800)]
intel: Move the gen4-6 3DPRIMITIVE handling out of the switch statement.

5 years agointel: Add support for (possibly) unsynchronized maps.
Eric Anholt [Fri, 10 Feb 2012 12:12:15 +0000 (04:12 -0800)]
intel: Add support for (possibly) unsynchronized maps.

This improves the performance of Mesa's GL_MAP_UNSYNCHRONIZED_BIT path
in GL_ARB_map_buffer_range.  Improves Unigine Tropics performance at
1024x768 by 2.30482% +/- 0.0492146% (n=61)

v2: Fix comment grammar.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
5 years agointel: Fix error check for I915_PARAM_HAS_LLC.
Eric Anholt [Tue, 28 Feb 2012 01:26:05 +0000 (17:26 -0800)]
intel: Fix error check for I915_PARAM_HAS_LLC.

drmIoctl returns -1 on error with errno set to the error value.  Other
users of it in this file just check for != 0, and only use errno when
they need to send an error value on to the caller of the API.

5 years agointel: Bump the copyright dates on the bufmgr files.
Eric Anholt [Sat, 10 Mar 2012 00:08:23 +0000 (16:08 -0800)]
intel: Bump the copyright dates on the bufmgr files.

We've been hacking these constantly.

5 years agointel: Add .aub file output support.
Eric Anholt [Tue, 11 Oct 2011 22:59:03 +0000 (15:59 -0700)]
intel: Add .aub file output support.

This will allow the driver to capture all of its execution state to a
file for later debugging.  intel_gpu_dump is limited in that it only
captures batchbuffers, and Mesa's captures, while more complete, still
capture only a portion of the state involved in execution.

This is a squash commit of a long series of hacking as we tried to get
the resulting traces to work in the internal simulator.  It contains
contributions by Yuanhan Liu and Kenneth Graunke.

v2: Drop the MI_FLUSH_ENABLE setup.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel: Add support for overriding the PCI ID via an environment variable
Kenneth Graunke [Tue, 11 Oct 2011 21:38:34 +0000 (14:38 -0700)]
intel: Add support for overriding the PCI ID via an environment variable

For example:

    export INTEL_DEVID_OVERRIDE=0x162

If this variable is set, don't actually submit the batchbuffer to the
GPU, it probably contains commands for the wrong generation of hardware.

v2: Introduce a getter for the overridden devid, and avoid getenv per exec.

Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
5 years agoxf86drmMode.h: Add header protection
David Herrman [Fri, 9 Mar 2012 18:40:14 +0000 (13:40 -0500)]
xf86drmMode.h: Add header protection

xf86drmMode.h is missing a header protection. xf86drm.h has one so just
copy it and adjust the name.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: David Herrmann <dh.herrmann@googlemail.com>
5 years agoMake drm/drm_fourcc.h portable to non-linux platforms
Alan Coopersmith [Fri, 3 Feb 2012 01:51:24 +0000 (17:51 -0800)]
Make drm/drm_fourcc.h portable to non-linux platforms

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
5 years agoDon't require pciaccess if Intel is disabled
Matt Turner [Thu, 1 Mar 2012 17:19:59 +0000 (12:19 -0500)]
Don't require pciaccess if Intel is disabled

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Matt Turner <mattst88@gmail.com>
5 years agointel: Import a new batchbuffer for the gen7 test.
Eric Anholt [Mon, 30 Jan 2012 23:21:29 +0000 (15:21 -0800)]
intel: Import a new batchbuffer for the gen7 test.

This one doesn't have the 3DSTATE_HIER_DEPTH_BUFFER bug that the
previous one did.

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agointel: Add decode for gen7 HIER_DEPTH_BUFFER.
Eric Anholt [Mon, 30 Jan 2012 23:13:32 +0000 (15:13 -0800)]
intel: Add decode for gen7 HIER_DEPTH_BUFFER.

Note that the regression test complains here: The batch that was
captured included a bug in its packet output, which was later fixed in
Mesa.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agointel: Add decode for gen7 3DSTATE_WM.
Eric Anholt [Mon, 30 Jan 2012 23:04:10 +0000 (15:04 -0800)]
intel: Add decode for gen7 3DSTATE_WM.

This requires pulling the gen6 3DSTATE_WM out to a function so it
doesn't override gen7's handler.

v2: Fix pasteo in interpreting ZW interpolation (thanks danvet!).

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agointel: Fix a typo in decode error message.
Eric Anholt [Fri, 27 Jan 2012 21:27:56 +0000 (13:27 -0800)]
intel: Fix a typo in decode error message.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agointel: Detect cache domain inconsistency with valgrind
Chris Wilson [Thu, 9 Feb 2012 10:29:22 +0000 (10:29 +0000)]
intel: Detect cache domain inconsistency with valgrind

Every access to either the GTT or CPU pointer is supposed to be
proceeded by a set_domain ioctl so that GEM is able to manage the cache
domains correctly and for the following access to be coherent. Of
course, some people explicitly want incoherent, non-blocking access
which is going to trigger warnings by this patch but are probably better
served by explicit suppression.

v2: Also mark the pointers as inaccessible following the explicit unmap
and implicit unmap upon return to the cache.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
5 years agoradeon: fix pitch alignment for scanout buffer
Jerome Glisse [Tue, 14 Feb 2012 01:45:53 +0000 (20:45 -0500)]
radeon: fix pitch alignment for scanout buffer

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agoconfigure: Fix pkg-config test in absence of valgrind
Chris Wilson [Mon, 13 Feb 2012 00:19:17 +0000 (00:19 +0000)]
configure: Fix pkg-config test in absence of valgrind

The empty string used for the not case is replaced by the default
if-else clause and so causes the configure to fail in the absence of
valgrind. Which is not quite what was intended.

Instead use the common idiom of setting a variable depending on whether
the true or false branch is taken and emit the conditional code as a
second step.

Reported-by: Tobias Jakobi <liquid.acid@gmx.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
5 years agointel: Mark up with valgrind intrinsics to reduce false positives
Chris Wilson [Thu, 9 Feb 2012 10:23:10 +0000 (10:23 +0000)]
intel: Mark up with valgrind intrinsics to reduce false positives

In particular, declare the hidden CPU mmaps to valgrind so that it knows
about those memory regions.

v2: Add an additional VG_CLEAR for the getparam

References: https://bugs.freedesktop.org/show_bug.cgi?id=35071
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
[anholt: Ideally valgrind should just learn about the ioctls, and
         removing the clear for the non-valgrindified code feels risky.]
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoradeon_cs_setup_bo: Fix accounting if caller specified write and read domains.
Michel Dänzer [Wed, 8 Feb 2012 09:49:08 +0000 (10:49 +0100)]
radeon_cs_setup_bo: Fix accounting if caller specified write and read domains.

Only account for the write domain in that case.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=43893 .

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
5 years agoconfigure: Bump version for 2.4.31
Jerome Glisse [Mon, 6 Feb 2012 20:22:58 +0000 (15:22 -0500)]
configure: Bump version for 2.4.31

5 years agoradeon: add r600_pci_ids.h to header file
Jerome Glisse [Mon, 6 Feb 2012 20:22:14 +0000 (15:22 -0500)]
radeon: add r600_pci_ids.h to header file

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agoradeon: fix surface API for good before anyone start relying on it
Jerome Glisse [Fri, 3 Feb 2012 17:22:11 +0000 (12:22 -0500)]
radeon: fix surface API for good before anyone start relying on it

The mipmap level computation was wrong, we need to know the block
width, height, depth of compressed texture to properly compute this.
Change API to provide block width, height, depth instead of nblk_x,
nblk_y, nblk_z.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agoradeon: surface fix macro -> micro tile fallback
Jerome Glisse [Thu, 2 Feb 2012 19:17:10 +0000 (14:17 -0500)]
radeon: surface fix macro -> micro tile fallback

We need to force 1D tiling only on old kernel the fallback was
broken along the way.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agoUsing sizeof() on a function parameter with an array type does not
Ville Syrjälä [Thu, 2 Feb 2012 19:53:43 +0000 (14:53 -0500)]
Using sizeof() on a function parameter with an array type does not
work. sizeof() treats such parameters as pointers.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
5 years agoThis function was missing.
Ville Syrjälä [Thu, 2 Feb 2012 19:53:41 +0000 (14:53 -0500)]
This function was missing.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
5 years agodrmModeFreeResources() always leaked some memory.
Ville Syrjälä [Thu, 2 Feb 2012 19:53:39 +0000 (14:53 -0500)]
drmModeFreeResources() always leaked some memory.
drmModeGetPlaneResources() and drmModeGetPlane() leaked in one error
path.

Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
5 years agoradeon: add surface allocator helper v10
Jerome Glisse [Sat, 10 Dec 2011 02:07:15 +0000 (21:07 -0500)]
radeon: add surface allocator helper v10

The surface allocator is able to build complete miptree when allocating
surface for r600/r700/evergreen/northern islands GPU family. It also
compute bo size and alignment for render buffer, depth buffer and
scanout buffer.

v2 fix r6xx/r7xx 2D tiling width align computation
v3 add tile split support and fix 1d texture alignment
v4 rework to more properly support compressed format, split surface pixel
   size and surface element size in separate fields
v5 support texture array (still issue on r6xx)
v6 split surface value computation and mipmap tree building, rework eg
   and newer computation
v7 add a check for tile split and 2d tiled
v8 initialize mode value before testing it in all case, reenable
   2D macro tile mode on r6xx for cubemap and array. Fix cubemap
   to force array size to the number of face.
v9 fix handling of stencil buffer on evergreen
v10 on evergreen depth buffer need to have enough room for a stencil
    buffer just after depth one

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
5 years agointel: query for LLC support
Eugeni Dodonov [Tue, 17 Jan 2012 17:20:19 +0000 (15:20 -0200)]
intel: query for LLC support

This adds support for querying the kernel about the LLC support in the
hardware.

In case the ioctl fails, we assume that it is present on GEN6 and GEN7.

v2: fix the return code checking

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
5 years agointel: Fix build of Intel DRM on x86 systems
Paul Berry [Tue, 31 Jan 2012 22:44:14 +0000 (14:44 -0800)]
intel: Fix build of Intel DRM on x86 systems

Commit efd6e81e inadvertently broke the build by looking for "i?86" or
"x86_64" in $host_os.  The correct variable to check is $host_cpu.

This was preventing libdrm_intel.so from being built.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
5 years agoDon't build Intel DRM if $CHOST is not i?86-* or x86_64-*
Jeremy Huddleston [Mon, 30 Jan 2012 23:20:04 +0000 (15:20 -0800)]
Don't build Intel DRM if $CHOST is not i?86-* or x86_64-*

This fixes a failure in 'make check' found by the tinderbox when trying to
build this code on Linux/ppc.  This code is only designed to run on
Intel platforms, so don't even bother building it if we're not in that set.

Found-by: Tinderbox
Signed-off-by: Jeremy Huddleston <jeremyhu@apple.com>
5 years agointel: Fix bufmgr_gem->gen for gen > 4
Chad Versace [Fri, 27 Jan 2012 18:02:16 +0000 (10:02 -0800)]
intel: Fix bufmgr_gem->gen for gen > 4

If the pci_device's actual gen was > 4, then we stupidly set
bufmgr_gem->gen = 6. Luckily this caused no bugs, and this fix shouldn't
change any behavior, because all checks against the gen currently have one
of the forms below:
    gen == 2
    gen == 3
    gen >= 4

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
5 years agointel: Add minimal decode for remaining gen7 packets in use.
Eric Anholt [Wed, 4 Jan 2012 22:36:13 +0000 (14:36 -0800)]
intel: Add minimal decode for remaining gen7 packets in use.

This just gets packet name and length in place, with the remainder
unfinished.  I've long since finished the work that got me started
fixing up the decode.

5 years agointel: Add decode for gen7 constant buffer packets.
Eric Anholt [Wed, 4 Jan 2012 21:41:55 +0000 (13:41 -0800)]
intel: Add decode for gen7 constant buffer packets.

5 years agointel: Add decode for gen7 state pointers.
Eric Anholt [Wed, 4 Jan 2012 20:23:42 +0000 (12:23 -0800)]
intel: Add decode for gen7 state pointers.

Since CC_STATE_POINTERS for gen6 and 7 are quite different but use the
same opcode, move gen6 out to a helper function too, so we can use a
helper function for gen7.

5 years agointel: Add support for parsing gen7 URB packets.
Eric Anholt [Wed, 4 Jan 2012 20:12:41 +0000 (12:12 -0800)]
intel: Add support for parsing gen7 URB packets.

5 years agointel: Make most of the logic for 965 3d packet length checks table-driven.
Eric Anholt [Wed, 4 Jan 2012 21:18:42 +0000 (13:18 -0800)]
intel: Make most of the logic for 965 3d packet length checks table-driven.

This puts the error message in a consistent location relative to the
packet, and while I'm here I made the error message a bit more
informative.

Now, most static length packets need to just declare their length in
the table and not worry.

5 years agointel: Move the logic for getting 965 3d packet length to the packet table.
Eric Anholt [Wed, 4 Jan 2012 21:00:29 +0000 (13:00 -0800)]
intel: Move the logic for getting 965 3d packet length to the packet table.

While I'm touching every line of the table, sort it by opcode.

5 years agointel: Add support for parsing 965 3d packets using helper functions.
Eric Anholt [Wed, 4 Jan 2012 20:06:44 +0000 (12:06 -0800)]
intel: Add support for parsing 965 3d packets using helper functions.

I want to add packets, without contributing to the switch statement of
doom.

5 years agointel: Parse the correct length for gen7 3DSTATE_MULTISAMPLE.
Eric Anholt [Wed, 4 Jan 2012 20:01:49 +0000 (12:01 -0800)]
intel: Parse the correct length for gen7 3DSTATE_MULTISAMPLE.

5 years agointel: Put the "gen" shorthand chipset identifier in the context.
Eric Anholt [Wed, 4 Jan 2012 20:00:59 +0000 (12:00 -0800)]
intel: Put the "gen" shorthand chipset identifier in the context.

It's a lot nicer than using IS_WHATEVER(devid) all over the place, and
we have this in our other projects too.