drm/i915: implement fastpath for overlay flip waiting
[daniel-s-linux-stuff:linux-kernel.git] / drivers / gpu / drm / i915 / i915_gem.c
1 /*
2  * Copyright © 2008 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27
28 #include "drmP.h"
29 #include "drm.h"
30 #include "i915_drm.h"
31 #include "i915_drv.h"
32 #include "i915_trace.h"
33 #include "intel_drv.h"
34 #include <linux/swap.h>
35 #include <linux/pci.h>
36
37 #define I915_GEM_GPU_DOMAINS    (~(I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT))
38
39 static void i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj);
40 static void i915_gem_object_flush_gtt_write_domain(struct drm_gem_object *obj);
41 static void i915_gem_object_flush_cpu_write_domain(struct drm_gem_object *obj);
42 static int i915_gem_object_set_to_cpu_domain(struct drm_gem_object *obj,
43                                              int write);
44 static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
45                                                      uint64_t offset,
46                                                      uint64_t size);
47 static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj);
48 static int i915_gem_object_wait_rendering(struct drm_gem_object *obj);
49 static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
50                                            unsigned alignment);
51 static void i915_gem_clear_fence_reg(struct drm_gem_object *obj);
52 static int i915_gem_evict_something(struct drm_device *dev, int min_size);
53 static int i915_gem_evict_from_inactive_list(struct drm_device *dev);
54 static int i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj,
55                                 struct drm_i915_gem_pwrite *args,
56                                 struct drm_file *file_priv);
57
58 static LIST_HEAD(shrink_list);
59 static DEFINE_SPINLOCK(shrink_list_lock);
60
61 int i915_gem_do_init(struct drm_device *dev, unsigned long start,
62                      unsigned long end)
63 {
64         drm_i915_private_t *dev_priv = dev->dev_private;
65
66         if (start >= end ||
67             (start & (PAGE_SIZE - 1)) != 0 ||
68             (end & (PAGE_SIZE - 1)) != 0) {
69                 return -EINVAL;
70         }
71
72         drm_mm_init(&dev_priv->mm.gtt_space, start,
73                     end - start);
74
75         dev->gtt_total = (uint32_t) (end - start);
76
77         return 0;
78 }
79
80 int
81 i915_gem_init_ioctl(struct drm_device *dev, void *data,
82                     struct drm_file *file_priv)
83 {
84         struct drm_i915_gem_init *args = data;
85         int ret;
86
87         mutex_lock(&dev->struct_mutex);
88         ret = i915_gem_do_init(dev, args->gtt_start, args->gtt_end);
89         mutex_unlock(&dev->struct_mutex);
90
91         return ret;
92 }
93
94 int
95 i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
96                             struct drm_file *file_priv)
97 {
98         struct drm_i915_gem_get_aperture *args = data;
99
100         if (!(dev->driver->driver_features & DRIVER_GEM))
101                 return -ENODEV;
102
103         args->aper_size = dev->gtt_total;
104         args->aper_available_size = (args->aper_size -
105                                      atomic_read(&dev->pin_memory));
106
107         return 0;
108 }
109
110
111 /**
112  * Creates a new mm object and returns a handle to it.
113  */
114 int
115 i915_gem_create_ioctl(struct drm_device *dev, void *data,
116                       struct drm_file *file_priv)
117 {
118         struct drm_i915_gem_create *args = data;
119         struct drm_gem_object *obj;
120         int ret;
121         u32 handle;
122
123         args->size = roundup(args->size, PAGE_SIZE);
124
125         /* Allocate the new object */
126         obj = drm_gem_object_alloc(dev, args->size);
127         if (obj == NULL)
128                 return -ENOMEM;
129
130         ret = drm_gem_handle_create(file_priv, obj, &handle);
131         mutex_lock(&dev->struct_mutex);
132         drm_gem_object_handle_unreference(obj);
133         mutex_unlock(&dev->struct_mutex);
134
135         if (ret)
136                 return ret;
137
138         args->handle = handle;
139
140         return 0;
141 }
142
143 static inline int
144 fast_shmem_read(struct page **pages,
145                 loff_t page_base, int page_offset,
146                 char __user *data,
147                 int length)
148 {
149         char __iomem *vaddr;
150         int unwritten;
151
152         vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0);
153         if (vaddr == NULL)
154                 return -ENOMEM;
155         unwritten = __copy_to_user_inatomic(data, vaddr + page_offset, length);
156         kunmap_atomic(vaddr, KM_USER0);
157
158         if (unwritten)
159                 return -EFAULT;
160
161         return 0;
162 }
163
164 static int i915_gem_object_needs_bit17_swizzle(struct drm_gem_object *obj)
165 {
166         drm_i915_private_t *dev_priv = obj->dev->dev_private;
167         struct drm_i915_gem_object *obj_priv = obj->driver_private;
168
169         return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
170                 obj_priv->tiling_mode != I915_TILING_NONE;
171 }
172
173 static inline int
174 slow_shmem_copy(struct page *dst_page,
175                 int dst_offset,
176                 struct page *src_page,
177                 int src_offset,
178                 int length)
179 {
180         char *dst_vaddr, *src_vaddr;
181
182         dst_vaddr = kmap_atomic(dst_page, KM_USER0);
183         if (dst_vaddr == NULL)
184                 return -ENOMEM;
185
186         src_vaddr = kmap_atomic(src_page, KM_USER1);
187         if (src_vaddr == NULL) {
188                 kunmap_atomic(dst_vaddr, KM_USER0);
189                 return -ENOMEM;
190         }
191
192         memcpy(dst_vaddr + dst_offset, src_vaddr + src_offset, length);
193
194         kunmap_atomic(src_vaddr, KM_USER1);
195         kunmap_atomic(dst_vaddr, KM_USER0);
196
197         return 0;
198 }
199
200 static inline int
201 slow_shmem_bit17_copy(struct page *gpu_page,
202                       int gpu_offset,
203                       struct page *cpu_page,
204                       int cpu_offset,
205                       int length,
206                       int is_read)
207 {
208         char *gpu_vaddr, *cpu_vaddr;
209
210         /* Use the unswizzled path if this page isn't affected. */
211         if ((page_to_phys(gpu_page) & (1 << 17)) == 0) {
212                 if (is_read)
213                         return slow_shmem_copy(cpu_page, cpu_offset,
214                                                gpu_page, gpu_offset, length);
215                 else
216                         return slow_shmem_copy(gpu_page, gpu_offset,
217                                                cpu_page, cpu_offset, length);
218         }
219
220         gpu_vaddr = kmap_atomic(gpu_page, KM_USER0);
221         if (gpu_vaddr == NULL)
222                 return -ENOMEM;
223
224         cpu_vaddr = kmap_atomic(cpu_page, KM_USER1);
225         if (cpu_vaddr == NULL) {
226                 kunmap_atomic(gpu_vaddr, KM_USER0);
227                 return -ENOMEM;
228         }
229
230         /* Copy the data, XORing A6 with A17 (1). The user already knows he's
231          * XORing with the other bits (A9 for Y, A9 and A10 for X)
232          */
233         while (length > 0) {
234                 int cacheline_end = ALIGN(gpu_offset + 1, 64);
235                 int this_length = min(cacheline_end - gpu_offset, length);
236                 int swizzled_gpu_offset = gpu_offset ^ 64;
237
238                 if (is_read) {
239                         memcpy(cpu_vaddr + cpu_offset,
240                                gpu_vaddr + swizzled_gpu_offset,
241                                this_length);
242                 } else {
243                         memcpy(gpu_vaddr + swizzled_gpu_offset,
244                                cpu_vaddr + cpu_offset,
245                                this_length);
246                 }
247                 cpu_offset += this_length;
248                 gpu_offset += this_length;
249                 length -= this_length;
250         }
251
252         kunmap_atomic(cpu_vaddr, KM_USER1);
253         kunmap_atomic(gpu_vaddr, KM_USER0);
254
255         return 0;
256 }
257
258 /**
259  * This is the fast shmem pread path, which attempts to copy_from_user directly
260  * from the backing pages of the object to the user's address space.  On a
261  * fault, it fails so we can fall back to i915_gem_shmem_pwrite_slow().
262  */
263 static int
264 i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj,
265                           struct drm_i915_gem_pread *args,
266                           struct drm_file *file_priv)
267 {
268         struct drm_i915_gem_object *obj_priv = obj->driver_private;
269         ssize_t remain;
270         loff_t offset, page_base;
271         char __user *user_data;
272         int page_offset, page_length;
273         int ret;
274
275         user_data = (char __user *) (uintptr_t) args->data_ptr;
276         remain = args->size;
277
278         mutex_lock(&dev->struct_mutex);
279
280         ret = i915_gem_object_get_pages(obj);
281         if (ret != 0)
282                 goto fail_unlock;
283
284         ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
285                                                         args->size);
286         if (ret != 0)
287                 goto fail_put_pages;
288
289         obj_priv = obj->driver_private;
290         offset = args->offset;
291
292         while (remain > 0) {
293                 /* Operation in this page
294                  *
295                  * page_base = page offset within aperture
296                  * page_offset = offset within page
297                  * page_length = bytes to copy for this page
298                  */
299                 page_base = (offset & ~(PAGE_SIZE-1));
300                 page_offset = offset & (PAGE_SIZE-1);
301                 page_length = remain;
302                 if ((page_offset + remain) > PAGE_SIZE)
303                         page_length = PAGE_SIZE - page_offset;
304
305                 ret = fast_shmem_read(obj_priv->pages,
306                                       page_base, page_offset,
307                                       user_data, page_length);
308                 if (ret)
309                         goto fail_put_pages;
310
311                 remain -= page_length;
312                 user_data += page_length;
313                 offset += page_length;
314         }
315
316 fail_put_pages:
317         i915_gem_object_put_pages(obj);
318 fail_unlock:
319         mutex_unlock(&dev->struct_mutex);
320
321         return ret;
322 }
323
324 static inline gfp_t
325 i915_gem_object_get_page_gfp_mask (struct drm_gem_object *obj)
326 {
327         return mapping_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping);
328 }
329
330 static inline void
331 i915_gem_object_set_page_gfp_mask (struct drm_gem_object *obj, gfp_t gfp)
332 {
333         mapping_set_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping, gfp);
334 }
335
336 static int
337 i915_gem_object_get_pages_or_evict(struct drm_gem_object *obj)
338 {
339         int ret;
340
341         ret = i915_gem_object_get_pages(obj);
342
343         /* If we've insufficient memory to map in the pages, attempt
344          * to make some space by throwing out some old buffers.
345          */
346         if (ret == -ENOMEM) {
347                 struct drm_device *dev = obj->dev;
348                 gfp_t gfp;
349
350                 ret = i915_gem_evict_something(dev, obj->size);
351                 if (ret)
352                         return ret;
353
354                 gfp = i915_gem_object_get_page_gfp_mask(obj);
355                 i915_gem_object_set_page_gfp_mask(obj, gfp & ~__GFP_NORETRY);
356                 ret = i915_gem_object_get_pages(obj);
357                 i915_gem_object_set_page_gfp_mask (obj, gfp);
358         }
359
360         return ret;
361 }
362
363 /**
364  * This is the fallback shmem pread path, which allocates temporary storage
365  * in kernel space to copy_to_user into outside of the struct_mutex, so we
366  * can copy out of the object's backing pages while holding the struct mutex
367  * and not take page faults.
368  */
369 static int
370 i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj,
371                           struct drm_i915_gem_pread *args,
372                           struct drm_file *file_priv)
373 {
374         struct drm_i915_gem_object *obj_priv = obj->driver_private;
375         struct mm_struct *mm = current->mm;
376         struct page **user_pages;
377         ssize_t remain;
378         loff_t offset, pinned_pages, i;
379         loff_t first_data_page, last_data_page, num_pages;
380         int shmem_page_index, shmem_page_offset;
381         int data_page_index,  data_page_offset;
382         int page_length;
383         int ret;
384         uint64_t data_ptr = args->data_ptr;
385         int do_bit17_swizzling;
386
387         remain = args->size;
388
389         /* Pin the user pages containing the data.  We can't fault while
390          * holding the struct mutex, yet we want to hold it while
391          * dereferencing the user data.
392          */
393         first_data_page = data_ptr / PAGE_SIZE;
394         last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
395         num_pages = last_data_page - first_data_page + 1;
396
397         user_pages = drm_calloc_large(num_pages, sizeof(struct page *));
398         if (user_pages == NULL)
399                 return -ENOMEM;
400
401         down_read(&mm->mmap_sem);
402         pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
403                                       num_pages, 1, 0, user_pages, NULL);
404         up_read(&mm->mmap_sem);
405         if (pinned_pages < num_pages) {
406                 ret = -EFAULT;
407                 goto fail_put_user_pages;
408         }
409
410         do_bit17_swizzling = i915_gem_object_needs_bit17_swizzle(obj);
411
412         mutex_lock(&dev->struct_mutex);
413
414         ret = i915_gem_object_get_pages_or_evict(obj);
415         if (ret)
416                 goto fail_unlock;
417
418         ret = i915_gem_object_set_cpu_read_domain_range(obj, args->offset,
419                                                         args->size);
420         if (ret != 0)
421                 goto fail_put_pages;
422
423         obj_priv = obj->driver_private;
424         offset = args->offset;
425
426         while (remain > 0) {
427                 /* Operation in this page
428                  *
429                  * shmem_page_index = page number within shmem file
430                  * shmem_page_offset = offset within page in shmem file
431                  * data_page_index = page number in get_user_pages return
432                  * data_page_offset = offset with data_page_index page.
433                  * page_length = bytes to copy for this page
434                  */
435                 shmem_page_index = offset / PAGE_SIZE;
436                 shmem_page_offset = offset & ~PAGE_MASK;
437                 data_page_index = data_ptr / PAGE_SIZE - first_data_page;
438                 data_page_offset = data_ptr & ~PAGE_MASK;
439
440                 page_length = remain;
441                 if ((shmem_page_offset + page_length) > PAGE_SIZE)
442                         page_length = PAGE_SIZE - shmem_page_offset;
443                 if ((data_page_offset + page_length) > PAGE_SIZE)
444                         page_length = PAGE_SIZE - data_page_offset;
445
446                 if (do_bit17_swizzling) {
447                         ret = slow_shmem_bit17_copy(obj_priv->pages[shmem_page_index],
448                                                     shmem_page_offset,
449                                                     user_pages[data_page_index],
450                                                     data_page_offset,
451                                                     page_length,
452                                                     1);
453                 } else {
454                         ret = slow_shmem_copy(user_pages[data_page_index],
455                                               data_page_offset,
456                                               obj_priv->pages[shmem_page_index],
457                                               shmem_page_offset,
458                                               page_length);
459                 }
460                 if (ret)
461                         goto fail_put_pages;
462
463                 remain -= page_length;
464                 data_ptr += page_length;
465                 offset += page_length;
466         }
467
468 fail_put_pages:
469         i915_gem_object_put_pages(obj);
470 fail_unlock:
471         mutex_unlock(&dev->struct_mutex);
472 fail_put_user_pages:
473         for (i = 0; i < pinned_pages; i++) {
474                 SetPageDirty(user_pages[i]);
475                 page_cache_release(user_pages[i]);
476         }
477         drm_free_large(user_pages);
478
479         return ret;
480 }
481
482 /**
483  * Reads data from the object referenced by handle.
484  *
485  * On error, the contents of *data are undefined.
486  */
487 int
488 i915_gem_pread_ioctl(struct drm_device *dev, void *data,
489                      struct drm_file *file_priv)
490 {
491         struct drm_i915_gem_pread *args = data;
492         struct drm_gem_object *obj;
493         struct drm_i915_gem_object *obj_priv;
494         int ret;
495
496         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
497         if (obj == NULL)
498                 return -EBADF;
499         obj_priv = obj->driver_private;
500
501         /* Bounds check source.
502          *
503          * XXX: This could use review for overflow issues...
504          */
505         if (args->offset > obj->size || args->size > obj->size ||
506             args->offset + args->size > obj->size) {
507                 drm_gem_object_unreference(obj);
508                 return -EINVAL;
509         }
510
511         if (i915_gem_object_needs_bit17_swizzle(obj)) {
512                 ret = i915_gem_shmem_pread_slow(dev, obj, args, file_priv);
513         } else {
514                 ret = i915_gem_shmem_pread_fast(dev, obj, args, file_priv);
515                 if (ret != 0)
516                         ret = i915_gem_shmem_pread_slow(dev, obj, args,
517                                                         file_priv);
518         }
519
520         drm_gem_object_unreference(obj);
521
522         return ret;
523 }
524
525 /* This is the fast write path which cannot handle
526  * page faults in the source data
527  */
528
529 static inline int
530 fast_user_write(struct io_mapping *mapping,
531                 loff_t page_base, int page_offset,
532                 char __user *user_data,
533                 int length)
534 {
535         char *vaddr_atomic;
536         unsigned long unwritten;
537
538         vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base);
539         unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset,
540                                                       user_data, length);
541         io_mapping_unmap_atomic(vaddr_atomic);
542         if (unwritten)
543                 return -EFAULT;
544         return 0;
545 }
546
547 /* Here's the write path which can sleep for
548  * page faults
549  */
550
551 static inline int
552 slow_kernel_write(struct io_mapping *mapping,
553                   loff_t gtt_base, int gtt_offset,
554                   struct page *user_page, int user_offset,
555                   int length)
556 {
557         char *src_vaddr, *dst_vaddr;
558         unsigned long unwritten;
559
560         dst_vaddr = io_mapping_map_atomic_wc(mapping, gtt_base);
561         src_vaddr = kmap_atomic(user_page, KM_USER1);
562         unwritten = __copy_from_user_inatomic_nocache(dst_vaddr + gtt_offset,
563                                                       src_vaddr + user_offset,
564                                                       length);
565         kunmap_atomic(src_vaddr, KM_USER1);
566         io_mapping_unmap_atomic(dst_vaddr);
567         if (unwritten)
568                 return -EFAULT;
569         return 0;
570 }
571
572 static inline int
573 fast_shmem_write(struct page **pages,
574                  loff_t page_base, int page_offset,
575                  char __user *data,
576                  int length)
577 {
578         char __iomem *vaddr;
579         unsigned long unwritten;
580
581         vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0);
582         if (vaddr == NULL)
583                 return -ENOMEM;
584         unwritten = __copy_from_user_inatomic(vaddr + page_offset, data, length);
585         kunmap_atomic(vaddr, KM_USER0);
586
587         if (unwritten)
588                 return -EFAULT;
589         return 0;
590 }
591
592 /**
593  * This is the fast pwrite path, where we copy the data directly from the
594  * user into the GTT, uncached.
595  */
596 static int
597 i915_gem_gtt_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj,
598                          struct drm_i915_gem_pwrite *args,
599                          struct drm_file *file_priv)
600 {
601         struct drm_i915_gem_object *obj_priv = obj->driver_private;
602         drm_i915_private_t *dev_priv = dev->dev_private;
603         ssize_t remain;
604         loff_t offset, page_base;
605         char __user *user_data;
606         int page_offset, page_length;
607         int ret;
608
609         user_data = (char __user *) (uintptr_t) args->data_ptr;
610         remain = args->size;
611         if (!access_ok(VERIFY_READ, user_data, remain))
612                 return -EFAULT;
613
614
615         mutex_lock(&dev->struct_mutex);
616         ret = i915_gem_object_pin(obj, 0);
617         if (ret) {
618                 mutex_unlock(&dev->struct_mutex);
619                 return ret;
620         }
621         ret = i915_gem_object_set_to_gtt_domain(obj, 1);
622         if (ret)
623                 goto fail;
624
625         obj_priv = obj->driver_private;
626         offset = obj_priv->gtt_offset + args->offset;
627
628         while (remain > 0) {
629                 /* Operation in this page
630                  *
631                  * page_base = page offset within aperture
632                  * page_offset = offset within page
633                  * page_length = bytes to copy for this page
634                  */
635                 page_base = (offset & ~(PAGE_SIZE-1));
636                 page_offset = offset & (PAGE_SIZE-1);
637                 page_length = remain;
638                 if ((page_offset + remain) > PAGE_SIZE)
639                         page_length = PAGE_SIZE - page_offset;
640
641                 ret = fast_user_write (dev_priv->mm.gtt_mapping, page_base,
642                                        page_offset, user_data, page_length);
643
644                 /* If we get a fault while copying data, then (presumably) our
645                  * source page isn't available.  Return the error and we'll
646                  * retry in the slow path.
647                  */
648                 if (ret)
649                         goto fail;
650
651                 remain -= page_length;
652                 user_data += page_length;
653                 offset += page_length;
654         }
655
656 fail:
657         i915_gem_object_unpin(obj);
658         mutex_unlock(&dev->struct_mutex);
659
660         return ret;
661 }
662
663 /**
664  * This is the fallback GTT pwrite path, which uses get_user_pages to pin
665  * the memory and maps it using kmap_atomic for copying.
666  *
667  * This code resulted in x11perf -rgb10text consuming about 10% more CPU
668  * than using i915_gem_gtt_pwrite_fast on a G45 (32-bit).
669  */
670 static int
671 i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
672                          struct drm_i915_gem_pwrite *args,
673                          struct drm_file *file_priv)
674 {
675         struct drm_i915_gem_object *obj_priv = obj->driver_private;
676         drm_i915_private_t *dev_priv = dev->dev_private;
677         ssize_t remain;
678         loff_t gtt_page_base, offset;
679         loff_t first_data_page, last_data_page, num_pages;
680         loff_t pinned_pages, i;
681         struct page **user_pages;
682         struct mm_struct *mm = current->mm;
683         int gtt_page_offset, data_page_offset, data_page_index, page_length;
684         int ret;
685         uint64_t data_ptr = args->data_ptr;
686
687         remain = args->size;
688
689         /* Pin the user pages containing the data.  We can't fault while
690          * holding the struct mutex, and all of the pwrite implementations
691          * want to hold it while dereferencing the user data.
692          */
693         first_data_page = data_ptr / PAGE_SIZE;
694         last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
695         num_pages = last_data_page - first_data_page + 1;
696
697         user_pages = drm_calloc_large(num_pages, sizeof(struct page *));
698         if (user_pages == NULL)
699                 return -ENOMEM;
700
701         down_read(&mm->mmap_sem);
702         pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
703                                       num_pages, 0, 0, user_pages, NULL);
704         up_read(&mm->mmap_sem);
705         if (pinned_pages < num_pages) {
706                 ret = -EFAULT;
707                 goto out_unpin_pages;
708         }
709
710         mutex_lock(&dev->struct_mutex);
711         ret = i915_gem_object_pin(obj, 0);
712         if (ret)
713                 goto out_unlock;
714
715         ret = i915_gem_object_set_to_gtt_domain(obj, 1);
716         if (ret)
717                 goto out_unpin_object;
718
719         obj_priv = obj->driver_private;
720         offset = obj_priv->gtt_offset + args->offset;
721
722         while (remain > 0) {
723                 /* Operation in this page
724                  *
725                  * gtt_page_base = page offset within aperture
726                  * gtt_page_offset = offset within page in aperture
727                  * data_page_index = page number in get_user_pages return
728                  * data_page_offset = offset with data_page_index page.
729                  * page_length = bytes to copy for this page
730                  */
731                 gtt_page_base = offset & PAGE_MASK;
732                 gtt_page_offset = offset & ~PAGE_MASK;
733                 data_page_index = data_ptr / PAGE_SIZE - first_data_page;
734                 data_page_offset = data_ptr & ~PAGE_MASK;
735
736                 page_length = remain;
737                 if ((gtt_page_offset + page_length) > PAGE_SIZE)
738                         page_length = PAGE_SIZE - gtt_page_offset;
739                 if ((data_page_offset + page_length) > PAGE_SIZE)
740                         page_length = PAGE_SIZE - data_page_offset;
741
742                 ret = slow_kernel_write(dev_priv->mm.gtt_mapping,
743                                         gtt_page_base, gtt_page_offset,
744                                         user_pages[data_page_index],
745                                         data_page_offset,
746                                         page_length);
747
748                 /* If we get a fault while copying data, then (presumably) our
749                  * source page isn't available.  Return the error and we'll
750                  * retry in the slow path.
751                  */
752                 if (ret)
753                         goto out_unpin_object;
754
755                 remain -= page_length;
756                 offset += page_length;
757                 data_ptr += page_length;
758         }
759
760 out_unpin_object:
761         i915_gem_object_unpin(obj);
762 out_unlock:
763         mutex_unlock(&dev->struct_mutex);
764 out_unpin_pages:
765         for (i = 0; i < pinned_pages; i++)
766                 page_cache_release(user_pages[i]);
767         drm_free_large(user_pages);
768
769         return ret;
770 }
771
772 /**
773  * This is the fast shmem pwrite path, which attempts to directly
774  * copy_from_user into the kmapped pages backing the object.
775  */
776 static int
777 i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj,
778                            struct drm_i915_gem_pwrite *args,
779                            struct drm_file *file_priv)
780 {
781         struct drm_i915_gem_object *obj_priv = obj->driver_private;
782         ssize_t remain;
783         loff_t offset, page_base;
784         char __user *user_data;
785         int page_offset, page_length;
786         int ret;
787
788         user_data = (char __user *) (uintptr_t) args->data_ptr;
789         remain = args->size;
790
791         mutex_lock(&dev->struct_mutex);
792
793         ret = i915_gem_object_get_pages(obj);
794         if (ret != 0)
795                 goto fail_unlock;
796
797         ret = i915_gem_object_set_to_cpu_domain(obj, 1);
798         if (ret != 0)
799                 goto fail_put_pages;
800
801         obj_priv = obj->driver_private;
802         offset = args->offset;
803         obj_priv->dirty = 1;
804
805         while (remain > 0) {
806                 /* Operation in this page
807                  *
808                  * page_base = page offset within aperture
809                  * page_offset = offset within page
810                  * page_length = bytes to copy for this page
811                  */
812                 page_base = (offset & ~(PAGE_SIZE-1));
813                 page_offset = offset & (PAGE_SIZE-1);
814                 page_length = remain;
815                 if ((page_offset + remain) > PAGE_SIZE)
816                         page_length = PAGE_SIZE - page_offset;
817
818                 ret = fast_shmem_write(obj_priv->pages,
819                                        page_base, page_offset,
820                                        user_data, page_length);
821                 if (ret)
822                         goto fail_put_pages;
823
824                 remain -= page_length;
825                 user_data += page_length;
826                 offset += page_length;
827         }
828
829 fail_put_pages:
830         i915_gem_object_put_pages(obj);
831 fail_unlock:
832         mutex_unlock(&dev->struct_mutex);
833
834         return ret;
835 }
836
837 /**
838  * This is the fallback shmem pwrite path, which uses get_user_pages to pin
839  * the memory and maps it using kmap_atomic for copying.
840  *
841  * This avoids taking mmap_sem for faulting on the user's address while the
842  * struct_mutex is held.
843  */
844 static int
845 i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
846                            struct drm_i915_gem_pwrite *args,
847                            struct drm_file *file_priv)
848 {
849         struct drm_i915_gem_object *obj_priv = obj->driver_private;
850         struct mm_struct *mm = current->mm;
851         struct page **user_pages;
852         ssize_t remain;
853         loff_t offset, pinned_pages, i;
854         loff_t first_data_page, last_data_page, num_pages;
855         int shmem_page_index, shmem_page_offset;
856         int data_page_index,  data_page_offset;
857         int page_length;
858         int ret;
859         uint64_t data_ptr = args->data_ptr;
860         int do_bit17_swizzling;
861
862         remain = args->size;
863
864         /* Pin the user pages containing the data.  We can't fault while
865          * holding the struct mutex, and all of the pwrite implementations
866          * want to hold it while dereferencing the user data.
867          */
868         first_data_page = data_ptr / PAGE_SIZE;
869         last_data_page = (data_ptr + args->size - 1) / PAGE_SIZE;
870         num_pages = last_data_page - first_data_page + 1;
871
872         user_pages = drm_calloc_large(num_pages, sizeof(struct page *));
873         if (user_pages == NULL)
874                 return -ENOMEM;
875
876         down_read(&mm->mmap_sem);
877         pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
878                                       num_pages, 0, 0, user_pages, NULL);
879         up_read(&mm->mmap_sem);
880         if (pinned_pages < num_pages) {
881                 ret = -EFAULT;
882                 goto fail_put_user_pages;
883         }
884
885         do_bit17_swizzling = i915_gem_object_needs_bit17_swizzle(obj);
886
887         mutex_lock(&dev->struct_mutex);
888
889         ret = i915_gem_object_get_pages_or_evict(obj);
890         if (ret)
891                 goto fail_unlock;
892
893         ret = i915_gem_object_set_to_cpu_domain(obj, 1);
894         if (ret != 0)
895                 goto fail_put_pages;
896
897         obj_priv = obj->driver_private;
898         offset = args->offset;
899         obj_priv->dirty = 1;
900
901         while (remain > 0) {
902                 /* Operation in this page
903                  *
904                  * shmem_page_index = page number within shmem file
905                  * shmem_page_offset = offset within page in shmem file
906                  * data_page_index = page number in get_user_pages return
907                  * data_page_offset = offset with data_page_index page.
908                  * page_length = bytes to copy for this page
909                  */
910                 shmem_page_index = offset / PAGE_SIZE;
911                 shmem_page_offset = offset & ~PAGE_MASK;
912                 data_page_index = data_ptr / PAGE_SIZE - first_data_page;
913                 data_page_offset = data_ptr & ~PAGE_MASK;
914
915                 page_length = remain;
916                 if ((shmem_page_offset + page_length) > PAGE_SIZE)
917                         page_length = PAGE_SIZE - shmem_page_offset;
918                 if ((data_page_offset + page_length) > PAGE_SIZE)
919                         page_length = PAGE_SIZE - data_page_offset;
920
921                 if (do_bit17_swizzling) {
922                         ret = slow_shmem_bit17_copy(obj_priv->pages[shmem_page_index],
923                                                     shmem_page_offset,
924                                                     user_pages[data_page_index],
925                                                     data_page_offset,
926                                                     page_length,
927                                                     0);
928                 } else {
929                         ret = slow_shmem_copy(obj_priv->pages[shmem_page_index],
930                                               shmem_page_offset,
931                                               user_pages[data_page_index],
932                                               data_page_offset,
933                                               page_length);
934                 }
935                 if (ret)
936                         goto fail_put_pages;
937
938                 remain -= page_length;
939                 data_ptr += page_length;
940                 offset += page_length;
941         }
942
943 fail_put_pages:
944         i915_gem_object_put_pages(obj);
945 fail_unlock:
946         mutex_unlock(&dev->struct_mutex);
947 fail_put_user_pages:
948         for (i = 0; i < pinned_pages; i++)
949                 page_cache_release(user_pages[i]);
950         drm_free_large(user_pages);
951
952         return ret;
953 }
954
955 /**
956  * Writes data to the object referenced by handle.
957  *
958  * On error, the contents of the buffer that were to be modified are undefined.
959  */
960 int
961 i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
962                       struct drm_file *file_priv)
963 {
964         struct drm_i915_gem_pwrite *args = data;
965         struct drm_gem_object *obj;
966         struct drm_i915_gem_object *obj_priv;
967         int ret = 0;
968
969         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
970         if (obj == NULL)
971                 return -EBADF;
972         obj_priv = obj->driver_private;
973
974         /* Bounds check destination.
975          *
976          * XXX: This could use review for overflow issues...
977          */
978         if (args->offset > obj->size || args->size > obj->size ||
979             args->offset + args->size > obj->size) {
980                 drm_gem_object_unreference(obj);
981                 return -EINVAL;
982         }
983
984         /* We can only do the GTT pwrite on untiled buffers, as otherwise
985          * it would end up going through the fenced access, and we'll get
986          * different detiling behavior between reading and writing.
987          * pread/pwrite currently are reading and writing from the CPU
988          * perspective, requiring manual detiling by the client.
989          */
990         if (obj_priv->phys_obj)
991                 ret = i915_gem_phys_pwrite(dev, obj, args, file_priv);
992         else if (obj_priv->tiling_mode == I915_TILING_NONE &&
993                  dev->gtt_total != 0) {
994                 ret = i915_gem_gtt_pwrite_fast(dev, obj, args, file_priv);
995                 if (ret == -EFAULT) {
996                         ret = i915_gem_gtt_pwrite_slow(dev, obj, args,
997                                                        file_priv);
998                 }
999         } else if (i915_gem_object_needs_bit17_swizzle(obj)) {
1000                 ret = i915_gem_shmem_pwrite_slow(dev, obj, args, file_priv);
1001         } else {
1002                 ret = i915_gem_shmem_pwrite_fast(dev, obj, args, file_priv);
1003                 if (ret == -EFAULT) {
1004                         ret = i915_gem_shmem_pwrite_slow(dev, obj, args,
1005                                                          file_priv);
1006                 }
1007         }
1008
1009 #if WATCH_PWRITE
1010         if (ret)
1011                 DRM_INFO("pwrite failed %d\n", ret);
1012 #endif
1013
1014         drm_gem_object_unreference(obj);
1015
1016         return ret;
1017 }
1018
1019 /**
1020  * Called when user space prepares to use an object with the CPU, either
1021  * through the mmap ioctl's mapping or a GTT mapping.
1022  */
1023 int
1024 i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
1025                           struct drm_file *file_priv)
1026 {
1027         struct drm_i915_private *dev_priv = dev->dev_private;
1028         struct drm_i915_gem_set_domain *args = data;
1029         struct drm_gem_object *obj;
1030         struct drm_i915_gem_object *obj_priv;
1031         uint32_t read_domains = args->read_domains;
1032         uint32_t write_domain = args->write_domain;
1033         int ret;
1034
1035         if (!(dev->driver->driver_features & DRIVER_GEM))
1036                 return -ENODEV;
1037
1038         /* Only handle setting domains to types used by the CPU. */
1039         if (write_domain & I915_GEM_GPU_DOMAINS)
1040                 return -EINVAL;
1041
1042         if (read_domains & I915_GEM_GPU_DOMAINS)
1043                 return -EINVAL;
1044
1045         /* Having something in the write domain implies it's in the read
1046          * domain, and only that read domain.  Enforce that in the request.
1047          */
1048         if (write_domain != 0 && read_domains != write_domain)
1049                 return -EINVAL;
1050
1051         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
1052         if (obj == NULL)
1053                 return -EBADF;
1054         obj_priv = obj->driver_private;
1055
1056         mutex_lock(&dev->struct_mutex);
1057
1058         intel_mark_busy(dev, obj);
1059
1060 #if WATCH_BUF
1061         DRM_INFO("set_domain_ioctl %p(%zd), %08x %08x\n",
1062                  obj, obj->size, read_domains, write_domain);
1063 #endif
1064         if (read_domains & I915_GEM_DOMAIN_GTT) {
1065                 ret = i915_gem_object_set_to_gtt_domain(obj, write_domain != 0);
1066
1067                 /* Update the LRU on the fence for the CPU access that's
1068                  * about to occur.
1069                  */
1070                 if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
1071                         list_move_tail(&obj_priv->fence_list,
1072                                        &dev_priv->mm.fence_list);
1073                 }
1074
1075                 /* Silently promote "you're not bound, there was nothing to do"
1076                  * to success, since the client was just asking us to
1077                  * make sure everything was done.
1078                  */
1079                 if (ret == -EINVAL)
1080                         ret = 0;
1081         } else {
1082                 ret = i915_gem_object_set_to_cpu_domain(obj, write_domain != 0);
1083         }
1084
1085         drm_gem_object_unreference(obj);
1086         mutex_unlock(&dev->struct_mutex);
1087         return ret;
1088 }
1089
1090 /**
1091  * Called when user space has done writes to this buffer
1092  */
1093 int
1094 i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
1095                       struct drm_file *file_priv)
1096 {
1097         struct drm_i915_gem_sw_finish *args = data;
1098         struct drm_gem_object *obj;
1099         struct drm_i915_gem_object *obj_priv;
1100         int ret = 0;
1101
1102         if (!(dev->driver->driver_features & DRIVER_GEM))
1103                 return -ENODEV;
1104
1105         mutex_lock(&dev->struct_mutex);
1106         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
1107         if (obj == NULL) {
1108                 mutex_unlock(&dev->struct_mutex);
1109                 return -EBADF;
1110         }
1111
1112 #if WATCH_BUF
1113         DRM_INFO("%s: sw_finish %d (%p %zd)\n",
1114                  __func__, args->handle, obj, obj->size);
1115 #endif
1116         obj_priv = obj->driver_private;
1117
1118         /* Pinned buffers may be scanout, so flush the cache */
1119         if (obj_priv->pin_count)
1120                 i915_gem_object_flush_cpu_write_domain(obj);
1121
1122         drm_gem_object_unreference(obj);
1123         mutex_unlock(&dev->struct_mutex);
1124         return ret;
1125 }
1126
1127 /**
1128  * Maps the contents of an object, returning the address it is mapped
1129  * into.
1130  *
1131  * While the mapping holds a reference on the contents of the object, it doesn't
1132  * imply a ref on the object itself.
1133  */
1134 int
1135 i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
1136                    struct drm_file *file_priv)
1137 {
1138         struct drm_i915_gem_mmap *args = data;
1139         struct drm_gem_object *obj;
1140         loff_t offset;
1141         unsigned long addr;
1142
1143         if (!(dev->driver->driver_features & DRIVER_GEM))
1144                 return -ENODEV;
1145
1146         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
1147         if (obj == NULL)
1148                 return -EBADF;
1149
1150         offset = args->offset;
1151
1152         down_write(&current->mm->mmap_sem);
1153         addr = do_mmap(obj->filp, 0, args->size,
1154                        PROT_READ | PROT_WRITE, MAP_SHARED,
1155                        args->offset);
1156         up_write(&current->mm->mmap_sem);
1157         mutex_lock(&dev->struct_mutex);
1158         drm_gem_object_unreference(obj);
1159         mutex_unlock(&dev->struct_mutex);
1160         if (IS_ERR((void *)addr))
1161                 return addr;
1162
1163         args->addr_ptr = (uint64_t) addr;
1164
1165         return 0;
1166 }
1167
1168 /**
1169  * i915_gem_fault - fault a page into the GTT
1170  * vma: VMA in question
1171  * vmf: fault info
1172  *
1173  * The fault handler is set up by drm_gem_mmap() when a object is GTT mapped
1174  * from userspace.  The fault handler takes care of binding the object to
1175  * the GTT (if needed), allocating and programming a fence register (again,
1176  * only if needed based on whether the old reg is still valid or the object
1177  * is tiled) and inserting a new PTE into the faulting process.
1178  *
1179  * Note that the faulting process may involve evicting existing objects
1180  * from the GTT and/or fence registers to make room.  So performance may
1181  * suffer if the GTT working set is large or there are few fence registers
1182  * left.
1183  */
1184 int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1185 {
1186         struct drm_gem_object *obj = vma->vm_private_data;
1187         struct drm_device *dev = obj->dev;
1188         struct drm_i915_private *dev_priv = dev->dev_private;
1189         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1190         pgoff_t page_offset;
1191         unsigned long pfn;
1192         int ret = 0;
1193         bool write = !!(vmf->flags & FAULT_FLAG_WRITE);
1194
1195         /* We don't use vmf->pgoff since that has the fake offset */
1196         page_offset = ((unsigned long)vmf->virtual_address - vma->vm_start) >>
1197                 PAGE_SHIFT;
1198
1199         /* Now bind it into the GTT if needed */
1200         mutex_lock(&dev->struct_mutex);
1201         if (!obj_priv->gtt_space) {
1202                 ret = i915_gem_object_bind_to_gtt(obj, 0);
1203                 if (ret)
1204                         goto unlock;
1205
1206                 list_add_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
1207
1208                 ret = i915_gem_object_set_to_gtt_domain(obj, write);
1209                 if (ret)
1210                         goto unlock;
1211         }
1212
1213         /* Need a new fence register? */
1214         if (obj_priv->tiling_mode != I915_TILING_NONE) {
1215                 ret = i915_gem_object_get_fence_reg(obj);
1216                 if (ret)
1217                         goto unlock;
1218         }
1219
1220         pfn = ((dev->agp->base + obj_priv->gtt_offset) >> PAGE_SHIFT) +
1221                 page_offset;
1222
1223         /* Finally, remap it using the new GTT offset */
1224         ret = vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, pfn);
1225 unlock:
1226         mutex_unlock(&dev->struct_mutex);
1227
1228         switch (ret) {
1229         case 0:
1230         case -ERESTARTSYS:
1231                 return VM_FAULT_NOPAGE;
1232         case -ENOMEM:
1233         case -EAGAIN:
1234                 return VM_FAULT_OOM;
1235         default:
1236                 return VM_FAULT_SIGBUS;
1237         }
1238 }
1239
1240 /**
1241  * i915_gem_create_mmap_offset - create a fake mmap offset for an object
1242  * @obj: obj in question
1243  *
1244  * GEM memory mapping works by handing back to userspace a fake mmap offset
1245  * it can use in a subsequent mmap(2) call.  The DRM core code then looks
1246  * up the object based on the offset and sets up the various memory mapping
1247  * structures.
1248  *
1249  * This routine allocates and attaches a fake offset for @obj.
1250  */
1251 static int
1252 i915_gem_create_mmap_offset(struct drm_gem_object *obj)
1253 {
1254         struct drm_device *dev = obj->dev;
1255         struct drm_gem_mm *mm = dev->mm_private;
1256         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1257         struct drm_map_list *list;
1258         struct drm_local_map *map;
1259         int ret = 0;
1260
1261         /* Set the object up for mmap'ing */
1262         list = &obj->map_list;
1263         list->map = kzalloc(sizeof(struct drm_map_list), GFP_KERNEL);
1264         if (!list->map)
1265                 return -ENOMEM;
1266
1267         map = list->map;
1268         map->type = _DRM_GEM;
1269         map->size = obj->size;
1270         map->handle = obj;
1271
1272         /* Get a DRM GEM mmap offset allocated... */
1273         list->file_offset_node = drm_mm_search_free(&mm->offset_manager,
1274                                                     obj->size / PAGE_SIZE, 0, 0);
1275         if (!list->file_offset_node) {
1276                 DRM_ERROR("failed to allocate offset for bo %d\n", obj->name);
1277                 ret = -ENOMEM;
1278                 goto out_free_list;
1279         }
1280
1281         list->file_offset_node = drm_mm_get_block(list->file_offset_node,
1282                                                   obj->size / PAGE_SIZE, 0);
1283         if (!list->file_offset_node) {
1284                 ret = -ENOMEM;
1285                 goto out_free_list;
1286         }
1287
1288         list->hash.key = list->file_offset_node->start;
1289         if (drm_ht_insert_item(&mm->offset_hash, &list->hash)) {
1290                 DRM_ERROR("failed to add to map hash\n");
1291                 goto out_free_mm;
1292         }
1293
1294         /* By now we should be all set, any drm_mmap request on the offset
1295          * below will get to our mmap & fault handler */
1296         obj_priv->mmap_offset = ((uint64_t) list->hash.key) << PAGE_SHIFT;
1297
1298         return 0;
1299
1300 out_free_mm:
1301         drm_mm_put_block(list->file_offset_node);
1302 out_free_list:
1303         kfree(list->map);
1304
1305         return ret;
1306 }
1307
1308 /**
1309  * i915_gem_release_mmap - remove physical page mappings
1310  * @obj: obj in question
1311  *
1312  * Preserve the reservation of the mmaping with the DRM core code, but
1313  * relinquish ownership of the pages back to the system.
1314  *
1315  * It is vital that we remove the page mapping if we have mapped a tiled
1316  * object through the GTT and then lose the fence register due to
1317  * resource pressure. Similarly if the object has been moved out of the
1318  * aperture, than pages mapped into userspace must be revoked. Removing the
1319  * mapping will then trigger a page fault on the next user access, allowing
1320  * fixup by i915_gem_fault().
1321  */
1322 void
1323 i915_gem_release_mmap(struct drm_gem_object *obj)
1324 {
1325         struct drm_device *dev = obj->dev;
1326         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1327
1328         if (dev->dev_mapping)
1329                 unmap_mapping_range(dev->dev_mapping,
1330                                     obj_priv->mmap_offset, obj->size, 1);
1331 }
1332
1333 static void
1334 i915_gem_free_mmap_offset(struct drm_gem_object *obj)
1335 {
1336         struct drm_device *dev = obj->dev;
1337         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1338         struct drm_gem_mm *mm = dev->mm_private;
1339         struct drm_map_list *list;
1340
1341         list = &obj->map_list;
1342         drm_ht_remove_item(&mm->offset_hash, &list->hash);
1343
1344         if (list->file_offset_node) {
1345                 drm_mm_put_block(list->file_offset_node);
1346                 list->file_offset_node = NULL;
1347         }
1348
1349         if (list->map) {
1350                 kfree(list->map);
1351                 list->map = NULL;
1352         }
1353
1354         obj_priv->mmap_offset = 0;
1355 }
1356
1357 /**
1358  * i915_gem_get_gtt_alignment - return required GTT alignment for an object
1359  * @obj: object to check
1360  *
1361  * Return the required GTT alignment for an object, taking into account
1362  * potential fence register mapping if needed.
1363  */
1364 static uint32_t
1365 i915_gem_get_gtt_alignment(struct drm_gem_object *obj)
1366 {
1367         struct drm_device *dev = obj->dev;
1368         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1369         int start, i;
1370
1371         /*
1372          * Minimum alignment is 4k (GTT page size), but might be greater
1373          * if a fence register is needed for the object.
1374          */
1375         if (IS_I965G(dev) || obj_priv->tiling_mode == I915_TILING_NONE)
1376                 return 4096;
1377
1378         /*
1379          * Previous chips need to be aligned to the size of the smallest
1380          * fence register that can contain the object.
1381          */
1382         if (IS_I9XX(dev))
1383                 start = 1024*1024;
1384         else
1385                 start = 512*1024;
1386
1387         for (i = start; i < obj->size; i <<= 1)
1388                 ;
1389
1390         return i;
1391 }
1392
1393 /**
1394  * i915_gem_mmap_gtt_ioctl - prepare an object for GTT mmap'ing
1395  * @dev: DRM device
1396  * @data: GTT mapping ioctl data
1397  * @file_priv: GEM object info
1398  *
1399  * Simply returns the fake offset to userspace so it can mmap it.
1400  * The mmap call will end up in drm_gem_mmap(), which will set things
1401  * up so we can get faults in the handler above.
1402  *
1403  * The fault handler will take care of binding the object into the GTT
1404  * (since it may have been evicted to make room for something), allocating
1405  * a fence register, and mapping the appropriate aperture address into
1406  * userspace.
1407  */
1408 int
1409 i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,
1410                         struct drm_file *file_priv)
1411 {
1412         struct drm_i915_gem_mmap_gtt *args = data;
1413         struct drm_i915_private *dev_priv = dev->dev_private;
1414         struct drm_gem_object *obj;
1415         struct drm_i915_gem_object *obj_priv;
1416         int ret;
1417
1418         if (!(dev->driver->driver_features & DRIVER_GEM))
1419                 return -ENODEV;
1420
1421         obj = drm_gem_object_lookup(dev, file_priv, args->handle);
1422         if (obj == NULL)
1423                 return -EBADF;
1424
1425         mutex_lock(&dev->struct_mutex);
1426
1427         obj_priv = obj->driver_private;
1428
1429         if (obj_priv->madv != I915_MADV_WILLNEED) {
1430                 DRM_ERROR("Attempting to mmap a purgeable buffer\n");
1431                 drm_gem_object_unreference(obj);
1432                 mutex_unlock(&dev->struct_mutex);
1433                 return -EINVAL;
1434         }
1435
1436
1437         if (!obj_priv->mmap_offset) {
1438                 ret = i915_gem_create_mmap_offset(obj);
1439                 if (ret) {
1440                         drm_gem_object_unreference(obj);
1441                         mutex_unlock(&dev->struct_mutex);
1442                         return ret;
1443                 }
1444         }
1445
1446         args->offset = obj_priv->mmap_offset;
1447
1448         /*
1449          * Pull it into the GTT so that we have a page list (makes the
1450          * initial fault faster and any subsequent flushing possible).
1451          */
1452         if (!obj_priv->agp_mem) {
1453                 ret = i915_gem_object_bind_to_gtt(obj, 0);
1454                 if (ret) {
1455                         drm_gem_object_unreference(obj);
1456                         mutex_unlock(&dev->struct_mutex);
1457                         return ret;
1458                 }
1459                 list_add_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
1460         }
1461
1462         drm_gem_object_unreference(obj);
1463         mutex_unlock(&dev->struct_mutex);
1464
1465         return 0;
1466 }
1467
1468 void
1469 i915_gem_object_put_pages(struct drm_gem_object *obj)
1470 {
1471         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1472         int page_count = obj->size / PAGE_SIZE;
1473         int i;
1474
1475         BUG_ON(obj_priv->pages_refcount == 0);
1476         BUG_ON(obj_priv->madv == __I915_MADV_PURGED);
1477
1478         if (--obj_priv->pages_refcount != 0)
1479                 return;
1480
1481         if (obj_priv->tiling_mode != I915_TILING_NONE)
1482                 i915_gem_object_save_bit_17_swizzle(obj);
1483
1484         if (obj_priv->madv == I915_MADV_DONTNEED)
1485                 obj_priv->dirty = 0;
1486
1487         for (i = 0; i < page_count; i++) {
1488                 if (obj_priv->pages[i] == NULL)
1489                         break;
1490
1491                 if (obj_priv->dirty)
1492                         set_page_dirty(obj_priv->pages[i]);
1493
1494                 if (obj_priv->madv == I915_MADV_WILLNEED)
1495                         mark_page_accessed(obj_priv->pages[i]);
1496
1497                 page_cache_release(obj_priv->pages[i]);
1498         }
1499         obj_priv->dirty = 0;
1500
1501         drm_free_large(obj_priv->pages);
1502         obj_priv->pages = NULL;
1503 }
1504
1505 static void
1506 i915_gem_object_move_to_active(struct drm_gem_object *obj, uint32_t seqno)
1507 {
1508         struct drm_device *dev = obj->dev;
1509         drm_i915_private_t *dev_priv = dev->dev_private;
1510         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1511
1512         /* Add a reference if we're newly entering the active list. */
1513         if (!obj_priv->active) {
1514                 drm_gem_object_reference(obj);
1515                 obj_priv->active = 1;
1516         }
1517         /* Move from whatever list we were on to the tail of execution. */
1518         spin_lock(&dev_priv->mm.active_list_lock);
1519         list_move_tail(&obj_priv->list,
1520                        &dev_priv->mm.active_list);
1521         spin_unlock(&dev_priv->mm.active_list_lock);
1522         obj_priv->last_rendering_seqno = seqno;
1523 }
1524
1525 static void
1526 i915_gem_object_move_to_flushing(struct drm_gem_object *obj)
1527 {
1528         struct drm_device *dev = obj->dev;
1529         drm_i915_private_t *dev_priv = dev->dev_private;
1530         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1531
1532         BUG_ON(!obj_priv->active);
1533         list_move_tail(&obj_priv->list, &dev_priv->mm.flushing_list);
1534         obj_priv->last_rendering_seqno = 0;
1535 }
1536
1537 /* Immediately discard the backing storage */
1538 static void
1539 i915_gem_object_truncate(struct drm_gem_object *obj)
1540 {
1541         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1542         struct inode *inode;
1543
1544         inode = obj->filp->f_path.dentry->d_inode;
1545         if (inode->i_op->truncate)
1546                 inode->i_op->truncate (inode);
1547
1548         obj_priv->madv = __I915_MADV_PURGED;
1549 }
1550
1551 static inline int
1552 i915_gem_object_is_purgeable(struct drm_i915_gem_object *obj_priv)
1553 {
1554         return obj_priv->madv == I915_MADV_DONTNEED;
1555 }
1556
1557 static void
1558 i915_gem_object_move_to_inactive(struct drm_gem_object *obj)
1559 {
1560         struct drm_device *dev = obj->dev;
1561         drm_i915_private_t *dev_priv = dev->dev_private;
1562         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1563
1564         i915_verify_inactive(dev, __FILE__, __LINE__);
1565         if (obj_priv->pin_count != 0)
1566                 list_del_init(&obj_priv->list);
1567         else
1568                 list_move_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
1569
1570         obj_priv->last_rendering_seqno = 0;
1571         if (obj_priv->active) {
1572                 obj_priv->active = 0;
1573                 drm_gem_object_unreference(obj);
1574         }
1575         i915_verify_inactive(dev, __FILE__, __LINE__);
1576 }
1577
1578 /**
1579  * Creates a new sequence number, emitting a write of it to the status page
1580  * plus an interrupt, which will trigger i915_user_interrupt_handler.
1581  *
1582  * Must be called with struct_lock held.
1583  *
1584  * Returned sequence numbers are nonzero on success.
1585  */
1586 uint32_t
1587 i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
1588                  uint32_t flush_domains)
1589 {
1590         drm_i915_private_t *dev_priv = dev->dev_private;
1591         struct drm_i915_file_private *i915_file_priv = NULL;
1592         struct drm_i915_gem_request *request;
1593         uint32_t seqno;
1594         int was_empty;
1595         RING_LOCALS;
1596
1597         if (file_priv != NULL)
1598                 i915_file_priv = file_priv->driver_priv;
1599
1600         request = kzalloc(sizeof(*request), GFP_KERNEL);
1601         if (request == NULL)
1602                 return 0;
1603
1604         /* Grab the seqno we're going to make this request be, and bump the
1605          * next (skipping 0 so it can be the reserved no-seqno value).
1606          */
1607         seqno = dev_priv->mm.next_gem_seqno;
1608         dev_priv->mm.next_gem_seqno++;
1609         if (dev_priv->mm.next_gem_seqno == 0)
1610                 dev_priv->mm.next_gem_seqno++;
1611
1612         BEGIN_LP_RING(4);
1613         OUT_RING(MI_STORE_DWORD_INDEX);
1614         OUT_RING(I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
1615         OUT_RING(seqno);
1616
1617         OUT_RING(MI_USER_INTERRUPT);
1618         ADVANCE_LP_RING();
1619
1620         DRM_DEBUG("%d\n", seqno);
1621
1622         request->seqno = seqno;
1623         request->emitted_jiffies = jiffies;
1624         was_empty = list_empty(&dev_priv->mm.request_list);
1625         list_add_tail(&request->list, &dev_priv->mm.request_list);
1626         if (i915_file_priv) {
1627                 list_add_tail(&request->client_list,
1628                               &i915_file_priv->mm.request_list);
1629         } else {
1630                 INIT_LIST_HEAD(&request->client_list);
1631         }
1632
1633         /* Associate any objects on the flushing list matching the write
1634          * domain we're flushing with our flush.
1635          */
1636         if (flush_domains != 0) {
1637                 struct drm_i915_gem_object *obj_priv, *next;
1638
1639                 list_for_each_entry_safe(obj_priv, next,
1640                                          &dev_priv->mm.flushing_list, list) {
1641                         struct drm_gem_object *obj = obj_priv->obj;
1642
1643                         if ((obj->write_domain & flush_domains) ==
1644                             obj->write_domain) {
1645                                 uint32_t old_write_domain = obj->write_domain;
1646
1647                                 obj->write_domain = 0;
1648                                 i915_gem_object_move_to_active(obj, seqno);
1649
1650                                 trace_i915_gem_object_change_domain(obj,
1651                                                                     obj->read_domains,
1652                                                                     old_write_domain);
1653                         }
1654                 }
1655
1656         }
1657
1658         if (!dev_priv->mm.suspended) {
1659                 mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
1660                 if (was_empty)
1661                         queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
1662         }
1663         return seqno;
1664 }
1665
1666 /**
1667  * Command execution barrier
1668  *
1669  * Ensures that all commands in the ring are finished
1670  * before signalling the CPU
1671  */
1672 static uint32_t
1673 i915_retire_commands(struct drm_device *dev)
1674 {
1675         drm_i915_private_t *dev_priv = dev->dev_private;
1676         uint32_t cmd = MI_FLUSH | MI_NO_WRITE_FLUSH;
1677         uint32_t flush_domains = 0;
1678         RING_LOCALS;
1679
1680         /* The sampler always gets flushed on i965 (sigh) */
1681         if (IS_I965G(dev))
1682                 flush_domains |= I915_GEM_DOMAIN_SAMPLER;
1683         BEGIN_LP_RING(2);
1684         OUT_RING(cmd);
1685         OUT_RING(0); /* noop */
1686         ADVANCE_LP_RING();
1687         return flush_domains;
1688 }
1689
1690 /**
1691  * Moves buffers associated only with the given active seqno from the active
1692  * to inactive list, potentially freeing them.
1693  */
1694 static void
1695 i915_gem_retire_request(struct drm_device *dev,
1696                         struct drm_i915_gem_request *request)
1697 {
1698         drm_i915_private_t *dev_priv = dev->dev_private;
1699
1700         trace_i915_gem_request_retire(dev, request->seqno);
1701
1702         /* Move any buffers on the active list that are no longer referenced
1703          * by the ringbuffer to the flushing/inactive lists as appropriate.
1704          */
1705         spin_lock(&dev_priv->mm.active_list_lock);
1706         while (!list_empty(&dev_priv->mm.active_list)) {
1707                 struct drm_gem_object *obj;
1708                 struct drm_i915_gem_object *obj_priv;
1709
1710                 obj_priv = list_first_entry(&dev_priv->mm.active_list,
1711                                             struct drm_i915_gem_object,
1712                                             list);
1713                 obj = obj_priv->obj;
1714
1715                 /* If the seqno being retired doesn't match the oldest in the
1716                  * list, then the oldest in the list must still be newer than
1717                  * this seqno.
1718                  */
1719                 if (obj_priv->last_rendering_seqno != request->seqno)
1720                         goto out;
1721
1722 #if WATCH_LRU
1723                 DRM_INFO("%s: retire %d moves to inactive list %p\n",
1724                          __func__, request->seqno, obj);
1725 #endif
1726
1727                 if (obj->write_domain != 0)
1728                         i915_gem_object_move_to_flushing(obj);
1729                 else {
1730                         /* Take a reference on the object so it won't be
1731                          * freed while the spinlock is held.  The list
1732                          * protection for this spinlock is safe when breaking
1733                          * the lock like this since the next thing we do
1734                          * is just get the head of the list again.
1735                          */
1736                         drm_gem_object_reference(obj);
1737                         i915_gem_object_move_to_inactive(obj);
1738                         spin_unlock(&dev_priv->mm.active_list_lock);
1739                         drm_gem_object_unreference(obj);
1740                         spin_lock(&dev_priv->mm.active_list_lock);
1741                 }
1742         }
1743 out:
1744         spin_unlock(&dev_priv->mm.active_list_lock);
1745 }
1746
1747 /**
1748  * Returns true if seq1 is later than seq2.
1749  */
1750 bool
1751 i915_seqno_passed(uint32_t seq1, uint32_t seq2)
1752 {
1753         return (int32_t)(seq1 - seq2) >= 0;
1754 }
1755
1756 uint32_t
1757 i915_get_gem_seqno(struct drm_device *dev)
1758 {
1759         drm_i915_private_t *dev_priv = dev->dev_private;
1760
1761         return READ_HWSP(dev_priv, I915_GEM_HWS_INDEX);
1762 }
1763
1764 /**
1765  * This function clears the request list as sequence numbers are passed.
1766  */
1767 void
1768 i915_gem_retire_requests(struct drm_device *dev)
1769 {
1770         drm_i915_private_t *dev_priv = dev->dev_private;
1771         uint32_t seqno;
1772
1773         if (!dev_priv->hw_status_page || list_empty(&dev_priv->mm.request_list))
1774                 return;
1775
1776         seqno = i915_get_gem_seqno(dev);
1777
1778         while (!list_empty(&dev_priv->mm.request_list)) {
1779                 struct drm_i915_gem_request *request;
1780                 uint32_t retiring_seqno;
1781
1782                 request = list_first_entry(&dev_priv->mm.request_list,
1783                                            struct drm_i915_gem_request,
1784                                            list);
1785                 retiring_seqno = request->seqno;
1786
1787                 if (i915_seqno_passed(seqno, retiring_seqno) ||
1788                     atomic_read(&dev_priv->mm.wedged)) {
1789                         i915_gem_retire_request(dev, request);
1790
1791                         list_del(&request->list);
1792                         list_del(&request->client_list);
1793                         kfree(request);
1794                 } else
1795                         break;
1796         }
1797
1798         if (unlikely (dev_priv->trace_irq_seqno &&
1799                       i915_seqno_passed(dev_priv->trace_irq_seqno, seqno))) {
1800                 i915_user_irq_put(dev);
1801                 dev_priv->trace_irq_seqno = 0;
1802         }
1803 }
1804
1805 void
1806 i915_gem_retire_work_handler(struct work_struct *work)
1807 {
1808         drm_i915_private_t *dev_priv;
1809         struct drm_device *dev;
1810
1811         dev_priv = container_of(work, drm_i915_private_t,
1812                                 mm.retire_work.work);
1813         dev = dev_priv->dev;
1814
1815         mutex_lock(&dev->struct_mutex);
1816         i915_gem_retire_requests(dev);
1817         if (!dev_priv->mm.suspended &&
1818             !list_empty(&dev_priv->mm.request_list))
1819                 queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
1820         mutex_unlock(&dev->struct_mutex);
1821 }
1822
1823 int
1824 i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible)
1825 {
1826         drm_i915_private_t *dev_priv = dev->dev_private;
1827         u32 ier;
1828         int ret = 0;
1829
1830         BUG_ON(seqno == 0);
1831
1832         if (atomic_read(&dev_priv->mm.wedged))
1833                 return -EIO;
1834
1835         if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) {
1836                 if (IS_IGDNG(dev))
1837                         ier = I915_READ(DEIER) | I915_READ(GTIER);
1838                 else
1839                         ier = I915_READ(IER);
1840                 if (!ier) {
1841                         DRM_ERROR("something (likely vbetool) disabled "
1842                                   "interrupts, re-enabling\n");
1843                         i915_driver_irq_preinstall(dev);
1844                         i915_driver_irq_postinstall(dev);
1845                 }
1846
1847                 trace_i915_gem_request_wait_begin(dev, seqno);
1848
1849                 dev_priv->mm.waiting_gem_seqno = seqno;
1850                 i915_user_irq_get(dev);
1851                 if (interruptible)
1852                         ret = wait_event_interruptible(dev_priv->irq_queue,
1853                                 i915_seqno_passed(i915_get_gem_seqno(dev), seqno) ||
1854                                 atomic_read(&dev_priv->mm.wedged));
1855                 else
1856                         wait_event(dev_priv->irq_queue,
1857                                 i915_seqno_passed(i915_get_gem_seqno(dev), seqno) ||
1858                                 atomic_read(&dev_priv->mm.wedged));
1859
1860                 i915_user_irq_put(dev);
1861                 dev_priv->mm.waiting_gem_seqno = 0;
1862
1863                 trace_i915_gem_request_wait_end(dev, seqno);
1864         }
1865         if (atomic_read(&dev_priv->mm.wedged))
1866                 ret = -EIO;
1867
1868         if (ret && ret != -ERESTARTSYS)
1869                 DRM_ERROR("%s returns %d (awaiting %d at %d)\n",
1870                           __func__, ret, seqno, i915_get_gem_seqno(dev));
1871
1872         /* Directly dispatch request retiring.  While we have the work queue
1873          * to handle this, the waiter on a request often wants an associated
1874          * buffer to have made it to the inactive list, and we would need
1875          * a separate wait queue to handle that.
1876          */
1877         if (ret == 0)
1878                 i915_gem_retire_requests(dev);
1879
1880         return ret;
1881 }
1882
1883 /**
1884  * Waits for a sequence number to be signaled, and cleans up the
1885  * request and object lists appropriately for that event.
1886  */
1887 static int
1888 i915_wait_request(struct drm_device *dev, uint32_t seqno)
1889 {
1890         return i915_do_wait_request(dev, seqno, 1);
1891 }
1892
1893 /**
1894  * Waits for the ring to finish up to the latest request. Usefull for waiting
1895  * for flip events, e.g for the overlay support. */
1896 int i915_lp_ring_sync(struct drm_device *dev)
1897 {
1898         uint32_t seqno;
1899         int ret;
1900
1901         seqno = i915_add_request(dev, NULL, 0);
1902
1903         if (seqno == 0)
1904                 return -ENOMEM;
1905
1906         ret = i915_do_wait_request(dev, seqno, 0);
1907         BUG_ON(ret == -ERESTARTSYS);
1908         return ret;
1909 }
1910
1911 static void
1912 i915_gem_flush(struct drm_device *dev,
1913                uint32_t invalidate_domains,
1914                uint32_t flush_domains)
1915 {
1916         drm_i915_private_t *dev_priv = dev->dev_private;
1917         uint32_t cmd;
1918         RING_LOCALS;
1919
1920 #if WATCH_EXEC
1921         DRM_INFO("%s: invalidate %08x flush %08x\n", __func__,
1922                   invalidate_domains, flush_domains);
1923 #endif
1924         trace_i915_gem_request_flush(dev, dev_priv->mm.next_gem_seqno,
1925                                      invalidate_domains, flush_domains);
1926
1927         if (flush_domains & I915_GEM_DOMAIN_CPU)
1928                 drm_agp_chipset_flush(dev);
1929
1930         if ((invalidate_domains | flush_domains) & I915_GEM_GPU_DOMAINS) {
1931                 /*
1932                  * read/write caches:
1933                  *
1934                  * I915_GEM_DOMAIN_RENDER is always invalidated, but is
1935                  * only flushed if MI_NO_WRITE_FLUSH is unset.  On 965, it is
1936                  * also flushed at 2d versus 3d pipeline switches.
1937                  *
1938                  * read-only caches:
1939                  *
1940                  * I915_GEM_DOMAIN_SAMPLER is flushed on pre-965 if
1941                  * MI_READ_FLUSH is set, and is always flushed on 965.
1942                  *
1943                  * I915_GEM_DOMAIN_COMMAND may not exist?
1944                  *
1945                  * I915_GEM_DOMAIN_INSTRUCTION, which exists on 965, is
1946                  * invalidated when MI_EXE_FLUSH is set.
1947                  *
1948                  * I915_GEM_DOMAIN_VERTEX, which exists on 965, is
1949                  * invalidated with every MI_FLUSH.
1950                  *
1951                  * TLBs:
1952                  *
1953                  * On 965, TLBs associated with I915_GEM_DOMAIN_COMMAND
1954                  * and I915_GEM_DOMAIN_CPU in are invalidated at PTE write and
1955                  * I915_GEM_DOMAIN_RENDER and I915_GEM_DOMAIN_SAMPLER
1956                  * are flushed at any MI_FLUSH.
1957                  */
1958
1959                 cmd = MI_FLUSH | MI_NO_WRITE_FLUSH;
1960                 if ((invalidate_domains|flush_domains) &
1961                     I915_GEM_DOMAIN_RENDER)
1962                         cmd &= ~MI_NO_WRITE_FLUSH;
1963                 if (!IS_I965G(dev)) {
1964                         /*
1965                          * On the 965, the sampler cache always gets flushed
1966                          * and this bit is reserved.
1967                          */
1968                         if (invalidate_domains & I915_GEM_DOMAIN_SAMPLER)
1969                                 cmd |= MI_READ_FLUSH;
1970                 }
1971                 if (invalidate_domains & I915_GEM_DOMAIN_INSTRUCTION)
1972                         cmd |= MI_EXE_FLUSH;
1973
1974 #if WATCH_EXEC
1975                 DRM_INFO("%s: queue flush %08x to ring\n", __func__, cmd);
1976 #endif
1977                 BEGIN_LP_RING(2);
1978                 OUT_RING(cmd);
1979                 OUT_RING(MI_NOOP);
1980                 ADVANCE_LP_RING();
1981         }
1982 }
1983
1984 /**
1985  * Ensures that all rendering to the object has completed and the object is
1986  * safe to unbind from the GTT or access from the CPU.
1987  */
1988 static int
1989 i915_gem_object_wait_rendering(struct drm_gem_object *obj)
1990 {
1991         struct drm_device *dev = obj->dev;
1992         struct drm_i915_gem_object *obj_priv = obj->driver_private;
1993         int ret;
1994
1995         /* This function only exists to support waiting for existing rendering,
1996          * not for emitting required flushes.
1997          */
1998         BUG_ON((obj->write_domain & I915_GEM_GPU_DOMAINS) != 0);
1999
2000         /* If there is rendering queued on the buffer being evicted, wait for
2001          * it.
2002          */
2003         if (obj_priv->active) {
2004 #if WATCH_BUF
2005                 DRM_INFO("%s: object %p wait for seqno %08x\n",
2006                           __func__, obj, obj_priv->last_rendering_seqno);
2007 #endif
2008                 ret = i915_wait_request(dev, obj_priv->last_rendering_seqno);
2009                 if (ret != 0)
2010                         return ret;
2011         }
2012
2013         return 0;
2014 }
2015
2016 /**
2017  * Unbinds an object from the GTT aperture.
2018  */
2019 int
2020 i915_gem_object_unbind(struct drm_gem_object *obj)
2021 {
2022         struct drm_device *dev = obj->dev;
2023         struct drm_i915_gem_object *obj_priv = obj->driver_private;
2024         int ret = 0;
2025
2026 #if WATCH_BUF
2027         DRM_INFO("%s:%d %p\n", __func__, __LINE__, obj);
2028         DRM_INFO("gtt_space %p\n", obj_priv->gtt_space);
2029 #endif
2030         if (obj_priv->gtt_space == NULL)
2031                 return 0;
2032
2033         if (obj_priv->pin_count != 0) {
2034                 DRM_ERROR("Attempting to unbind pinned buffer\n");
2035                 return -EINVAL;
2036         }
2037
2038         /* blow away mappings if mapped through GTT */
2039         i915_gem_release_mmap(obj);
2040
2041         if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
2042                 i915_gem_clear_fence_reg(obj);
2043
2044         /* Move the object to the CPU domain to ensure that
2045          * any possible CPU writes while it's not in the GTT
2046          * are flushed when we go to remap it. This will
2047          * also ensure that all pending GPU writes are finished
2048          * before we unbind.
2049          */
2050         ret = i915_gem_object_set_to_cpu_domain(obj, 1);
2051         if (ret) {
2052                 if (ret != -ERESTARTSYS)
2053                         DRM_ERROR("set_domain failed: %d\n", ret);
2054                 return ret;
2055         }
2056
2057         BUG_ON(obj_priv->active);
2058
2059         if (obj_priv->agp_mem != NULL) {
2060                 drm_unbind_agp(obj_priv->agp_mem);
2061                 drm_free_agp(obj_priv->agp_mem, obj->size / PAGE_SIZE);
2062                 obj_priv->agp_mem = NULL;
2063         }
2064
2065         i915_gem_object_put_pages(obj);
2066         BUG_ON(obj_priv->pages_refcount);
2067
2068         if (obj_priv->gtt_space) {
2069                 atomic_dec(&dev->gtt_count);
2070                 atomic_sub(obj->size, &dev->gtt_memory);
2071
2072                 drm_mm_put_block(obj_priv->gtt_space);
2073                 obj_priv->gtt_space = NULL;
2074         }
2075
2076         /* Remove ourselves from the LRU list if present. */
2077         if (!list_empty(&obj_priv->list))
2078                 list_del_init(&obj_priv->list);
2079
2080         if (i915_gem_object_is_purgeable(obj_priv))
2081                 i915_gem_object_truncate(obj);
2082
2083         trace_i915_gem_object_unbind(obj);
2084
2085         return 0;
2086 }
2087
2088 static struct drm_gem_object *
2089 i915_gem_find_inactive_object(struct drm_device *dev, int min_size)
2090 {
2091         drm_i915_private_t *dev_priv = dev->dev_private;
2092         struct drm_i915_gem_object *obj_priv;
2093         struct drm_gem_object *best = NULL;
2094         struct drm_gem_object *first = NULL;
2095
2096         /* Try to find the smallest clean object */
2097         list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list, list) {
2098                 struct drm_gem_object *obj = obj_priv->obj;
2099                 if (obj->size >= min_size) {
2100                         if ((!obj_priv->dirty ||
2101                              i915_gem_object_is_purgeable(obj_priv)) &&
2102                             (!best || obj->size < best->size)) {
2103                                 best = obj;
2104                                 if (best->size == min_size)
2105                                         return best;
2106                         }
2107                         if (!first)
2108                             first = obj;
2109                 }
2110         }
2111
2112         return best ? best : first;
2113 }
2114
2115 static int
2116 i915_gem_evict_everything(struct drm_device *dev)
2117 {
2118         drm_i915_private_t *dev_priv = dev->dev_private;
2119         uint32_t seqno;
2120         int ret;
2121         bool lists_empty;
2122
2123         spin_lock(&dev_priv->mm.active_list_lock);
2124         lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
2125                        list_empty(&dev_priv->mm.flushing_list) &&
2126                        list_empty(&dev_priv->mm.active_list));
2127         spin_unlock(&dev_priv->mm.active_list_lock);
2128
2129         if (lists_empty)
2130                 return -ENOSPC;
2131
2132         /* Flush everything (on to the inactive lists) and evict */
2133         i915_gem_flush(dev, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
2134         seqno = i915_add_request(dev, NULL, I915_GEM_GPU_DOMAINS);
2135         if (seqno == 0)
2136                 return -ENOMEM;
2137
2138         ret = i915_wait_request(dev, seqno);
2139         if (ret)
2140                 return ret;
2141
2142         ret = i915_gem_evict_from_inactive_list(dev);
2143         if (ret)
2144                 return ret;
2145
2146         spin_lock(&dev_priv->mm.active_list_lock);
2147         lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
2148                        list_empty(&dev_priv->mm.flushing_list) &&
2149                        list_empty(&dev_priv->mm.active_list));
2150         spin_unlock(&dev_priv->mm.active_list_lock);
2151         BUG_ON(!lists_empty);
2152
2153         return 0;
2154 }
2155
2156 static int
2157 i915_gem_evict_something(struct drm_device *dev, int min_size)
2158 {
2159         drm_i915_private_t *dev_priv = dev->dev_private;
2160         struct drm_gem_object *obj;
2161         int ret;
2162
2163         for (;;) {
2164                 i915_gem_retire_requests(dev);
2165
2166                 /* If there's an inactive buffer available now, grab it
2167                  * and be done.
2168                  */
2169                 obj = i915_gem_find_inactive_object(dev, min_size);
2170                 if (obj) {
2171                         struct drm_i915_gem_object *obj_priv;
2172
2173 #if WATCH_LRU
2174                         DRM_INFO("%s: evicting %p\n", __func__, obj);
2175 #endif
2176                         obj_priv = obj->driver_private;
2177                         BUG_ON(obj_priv->pin_count != 0);
2178                         BUG_ON(obj_priv->active);
2179
2180                         /* Wait on the rendering and unbind the buffer. */
2181                         return i915_gem_object_unbind(obj);
2182                 }
2183
2184                 /* If we didn't get anything, but the ring is still processing
2185                  * things, wait for the next to finish and hopefully leave us
2186                  * a buffer to evict.
2187                  */
2188                 if (!list_empty(&dev_priv->mm.request_list)) {
2189                         struct drm_i915_gem_request *request;
2190
2191                         request = list_first_entry(&dev_priv->mm.request_list,
2192                                                    struct drm_i915_gem_request,
2193                                                    list);
2194
2195                         ret = i915_wait_request(dev, request->seqno);
2196                         if (ret)
2197                                 return ret;
2198
2199                         continue;
2200                 }
2201
2202                 /* If we didn't have anything on the request list but there
2203                  * are buffers awaiting a flush, emit one and try again.
2204                  * When we wait on it, those buffers waiting for that flush
2205                  * will get moved to inactive.
2206                  */
2207                 if (!list_empty(&dev_priv->mm.flushing_list)) {
2208                         struct drm_i915_gem_object *obj_priv;
2209
2210                         /* Find an object that we can immediately reuse */
2211                         list_for_each_entry(obj_priv, &dev_priv->mm.flushing_list, list) {
2212                                 obj = obj_priv->obj;
2213                                 if (obj->size >= min_size)
2214                                         break;
2215
2216                                 obj = NULL;
2217                         }
2218
2219                         if (obj != NULL) {
2220                                 uint32_t seqno;
2221
2222                                 i915_gem_flush(dev,
2223                                                obj->write_domain,
2224                                                obj->write_domain);
2225                                 seqno = i915_add_request(dev, NULL, obj->write_domain);
2226                                 if (seqno == 0)
2227                                         return -ENOMEM;
2228
2229                                 ret = i915_wait_request(dev, seqno);
2230                                 if (ret)
2231                                         return ret;
2232
2233                                 continue;
2234                         }
2235                 }
2236
2237                 /* If we didn't do any of the above, there's no single buffer
2238                  * large enough to swap out for the new one, so just evict
2239                  * everything and start again. (This should be rare.)
2240                  */
2241                 if (!list_empty (&dev_priv->mm.inactive_list))
2242                         return i915_gem_evict_from_inactive_list(dev);
2243                 else
2244                         return i915_gem_evict_everything(dev);
2245         }
2246 }
2247
2248 int
2249 i915_gem_object_get_pages(struct drm_gem_object *obj)
2250 {
2251         struct drm_i915_gem_object *obj_priv = obj->driver_private;
2252         int page_count, i;
2253         struct address_space *mapping;
2254         struct inode *inode;
2255         struct page *page;
2256         int ret;
2257
2258         if (obj_priv->pages_refcount++ != 0)
2259                 return 0;
2260
2261         /* Get the list of pages out of our struct file.  They'll be pinned
2262          * at this point until we release them.
2263          */
2264         page_count = obj->size / PAGE_SIZE;
2265         BUG_ON(obj_priv->pages != NULL);
2266         obj_priv->pages = drm_calloc_large(page_count, sizeof(struct page *));
2267         if (obj_priv->pages == NULL) {
2268                 obj_priv->pages_refcount--;
2269                 return -ENOMEM;
2270         }
2271
2272         inode = obj->filp->f_path.dentry->d_inode;
2273         mapping = inode->i_mapping;
2274         for (i = 0; i < page_count; i++) {
2275                 page = read_mapping_page(mapping, i, NULL);
2276                 if (IS_ERR(page)) {
2277                         ret = PTR_ERR(page);
2278                         i915_gem_object_put_pages(obj);
2279                         return ret;
2280                 }
2281                 obj_priv->pages[i] = page;
2282         }
2283
2284         if (obj_priv->tiling_mode != I915_TILING_NONE)
2285                 i915_gem_object_do_bit_17_swizzle(obj);
2286
2287         return 0;
2288 }
2289
2290 static void i965_write_fence_reg(struct drm_i915_fence_reg *reg)
2291 {
2292         struct drm_gem_object *obj = reg->obj;
2293         struct drm_device *dev = obj->dev;
2294         drm_i915_private_t *dev_priv = dev->dev_private;
2295         struct drm_i915_gem_object *obj_priv = obj->driver_private;
2296         int regnum = obj_priv->fence_reg;
2297         uint64_t val;
2298
2299         val = (uint64_t)((obj_priv->gtt_offset + obj->size - 4096) &
2300                     0xfffff000) << 32;
2301         val |= obj_priv->gtt_offset & 0xfffff000;
2302         val |= ((obj_priv->stride / 128) - 1) << I965_FENCE_PITCH_SHIFT;
2303         if (obj_priv->tiling_mode == I915_TILING_Y)
2304                 val |= 1 << I965_FENCE_TILING_Y_SHIFT;
2305         val |= I965_FENCE_REG_VALID;
2306
2307         I915_WRITE64(FENCE_REG_965_0 + (regnum * 8), val);
2308 }
2309
2310 static void i915_write_fence_reg(struct drm_i915_fence_reg *reg)
2311 {
2312         struct drm_gem_object *obj = reg->obj;
2313         struct drm_device *dev = obj->dev;
2314         drm_i915_private_t *dev_priv = dev->dev_private;
2315         struct drm_i915_gem_object *obj_priv = obj->driver_private;
2316         int regnum = obj_priv->fence_reg;
2317         int tile_width;
2318         uint32_t fence_reg, val;
2319         uint32_t pitch_val;
2320
2321         if ((obj_priv->gtt_offset & ~I915_FENCE_START_MASK) ||
2322             (obj_priv->gtt_offset & (obj->size - 1))) {
2323                 WARN(1, "%s: object 0x%08x not 1M or size (0x%zx) aligned\n",
2324                      __func__, obj_priv->gtt_offset, obj->size);
2325                 return;
2326         }
2327
2328         if (obj_priv->tiling_mode == I915_TILING_Y &&
2329             HAS_128_BYTE_Y_TILING(dev))
2330                 tile_width = 128;
2331         else
2332                 tile_width = 512;
2333
2334         /* Note: pitch better be a power of two tile widths */
2335         pitch_val = obj_priv->stride / tile_width;
2336         pitch_val = ffs(pitch_val) - 1;
2337
2338         val = obj_priv->gtt_offset;
2339         if (obj_priv->tiling_mode == I915_TILING_Y)
2340                 val |= 1 << I830_FENCE_TILING_Y_SHIFT;
2341         val |= I915_FENCE_SIZE_BITS(obj->size);
2342         val |= pitch_val << I830_FENCE_PITCH_SHIFT;
2343         val |= I830_FENCE_REG_VALID;
2344
2345         if (regnum < 8)
2346                 fence_reg = FENCE_REG_830_0 + (regnum * 4);
2347         else
2348                 fence_reg = FENCE_REG_945_8 + ((regnum - 8) * 4);
2349         I915_WRITE(fence_reg, val);
2350 }
2351
2352 static void i830_write_fence_reg(struct drm_i915_fence_reg *reg)
2353 {
2354         struct drm_gem_object *obj = reg->obj;
2355         struct drm_device *dev = obj->dev;
2356         drm_i915_private_t *dev_priv = dev->dev_private;
2357         struct drm_i915_gem_object *obj_priv = obj->driver_private;
2358         int regnum = obj_priv->fence_reg;
2359         uint32_t val;
2360         uint32_t pitch_val;
2361         uint32_t fence_size_bits;
2362
2363         if ((obj_priv->gtt_offset & ~I830_FENCE_START_MASK) ||
2364             (obj_priv->gtt_offset & (obj->size - 1))) {
2365                 WARN(1, "%s: object 0x%08x not 512K or size aligned\n",
2366                      __func__, obj_priv->gtt_offset);
2367                 return;
2368         }
2369
2370         pitch_val = obj_priv->stride / 128;
2371         pitch_val = ffs(pitch_val) - 1;
2372         WARN_ON(pitch_val > I830_FENCE_MAX_PITCH_VAL);
2373
2374         val = obj_priv->gtt_offset;
2375         if (obj_priv->tiling_mode == I915_TILING_Y)
2376                 val |= 1 << I830_FENCE_TILING_Y_SHIFT;
2377         fence_size_bits = I830_FENCE_SIZE_BITS(obj->size);
2378         WARN_ON(fence_size_bits & ~0x00000f00);
2379         val |= fence_size_bits;
2380         val |= pitch_val << I830_FENCE_PITCH_SHIFT;
2381         val |= I830_FENCE_REG_VALID;
2382
2383         I915_WRITE(FENCE_REG_830_0 + (regnum * 4), val);
2384 }
2385
2386 /**
2387  * i915_gem_object_get_fence_reg - set up a fence reg for an object
2388  * @obj: object to map through a fence reg
2389  *
2390  * When mapping objects through the GTT, userspace wants to be able to write
2391  * to them without having to worry about swizzling if the object is tiled.
2392  *
2393  * This function walks the fence regs looking for a free one for @obj,
2394  * stealing one if it can't find any.
2395  *
2396  * It then sets up the reg based on the object's properties: address, pitch
2397  * and tiling format.
2398  */
2399 int
2400 i915_gem_object_get_fence_reg(struct drm_gem_object *obj)
2401 {
2402         struct drm_device *dev = obj->dev;
2403         struct drm_i915_private *dev_priv = dev->dev_private;
2404         struct drm_i915_gem_object *obj_priv = obj->driver_private;
2405         struct drm_i915_fence_reg *reg = NULL;
2406         struct drm_i915_gem_object *old_obj_priv = NULL;
2407         int i, ret, avail;
2408
2409         /* Just update our place in the LRU if our fence is getting used. */
2410         if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
2411                 list_move_tail(&obj_priv->fence_list, &dev_priv->mm.fence_list);
2412                 return 0;
2413         }
2414
2415         switch (obj_priv->tiling_mode) {
2416         case I915_TILING_NONE:
2417                 WARN(1, "allocating a fence for non-tiled object?\n");
2418                 break;
2419         case I915_TILING_X:
2420                 if (!obj_priv->stride)
2421                         return -EINVAL;
2422                 WARN((obj_priv->stride & (512 - 1)),
2423                      "object 0x%08x is X tiled but has non-512B pitch\n",
2424                      obj_priv->gtt_offset);
2425                 break;
2426         case I915_TILING_Y:
2427                 if (!obj_priv->stride)
2428                         return -EINVAL;
2429                 WARN((obj_priv->stride & (128 - 1)),
2430                      "object 0x%08x is Y tiled but has non-128B pitch\n",
2431                      obj_priv->gtt_offset);
2432                 break;
2433         }
2434
2435         /* First try to find a free reg */
2436         avail = 0;
2437         for (i = dev_priv->fence_reg_start; i < dev_priv->num_fence_regs; i++) {
2438                 reg = &dev_priv->fence_regs[i];
2439                 if (!reg->obj)
2440                         break;
2441
2442                 old_obj_priv = reg->obj->driver_private;
2443                 if (!old_obj_priv->pin_count)
2444                     avail++;
2445         }
2446
2447         /* None available, try to steal one or wait for a user to finish */
2448         if (i == dev_priv->num_fence_regs) {
2449                 struct drm_gem_object *old_obj = NULL;
2450
2451                 if (avail == 0)
2452                         return -ENOSPC;
2453
2454                 list_for_each_entry(old_obj_priv, &dev_priv->mm.fence_list,
2455                                     fence_list) {
2456                         old_obj = old_obj_priv->obj;
2457
2458                         if (old_obj_priv->pin_count)
2459                                 continue;
2460
2461                         /* Take a reference, as otherwise the wait_rendering
2462                          * below may cause the object to get freed out from
2463                          * under us.
2464                          */
2465                         drm_gem_object_reference(old_obj);
2466
2467                         /* i915 uses fences for GPU access to tiled buffers */
2468                         if (IS_I965G(dev) || !old_obj_priv->active)
2469                                 break;
2470
2471                         /* This brings the object to the head of the LRU if it
2472                          * had been written to.  The only way this should
2473                          * result in us waiting longer than the expected
2474                          * optimal amount of time is if there was a
2475                          * fence-using buffer later that was read-only.
2476                          */
2477                         i915_gem_object_flush_gpu_write_domain(old_obj);
2478                         ret = i915_gem_object_wait_rendering(old_obj);