serial: suncore: Add 'ignore_line' argument to sunserial_console_match().
[daniel-s-linux-stuff:linux-kernel.git] / drivers / serial / sunsu.c
1 /*
2  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
3  *
4  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
5  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
6  *
7  * This is mainly a variation of 8250.c, credits go to authors mentioned
8  * therein.  In fact this driver should be merged into the generic 8250.c
9  * infrastructure perhaps using a 8250_sparc.c module.
10  *
11  * Fixed to use tty_get_baud_rate().
12  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13  *
14  * Converted to new 2.5.x UART layer.
15  *   David S. Miller (davem@davemloft.net), 2002-Jul-29
16  */
17
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/spinlock.h>
21 #include <linux/errno.h>
22 #include <linux/tty.h>
23 #include <linux/tty_flip.h>
24 #include <linux/major.h>
25 #include <linux/string.h>
26 #include <linux/ptrace.h>
27 #include <linux/ioport.h>
28 #include <linux/circ_buf.h>
29 #include <linux/serial.h>
30 #include <linux/sysrq.h>
31 #include <linux/console.h>
32 #ifdef CONFIG_SERIO
33 #include <linux/serio.h>
34 #endif
35 #include <linux/serial_reg.h>
36 #include <linux/init.h>
37 #include <linux/delay.h>
38 #include <linux/of_device.h>
39
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <asm/prom.h>
43
44 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
45 #define SUPPORT_SYSRQ
46 #endif
47
48 #include <linux/serial_core.h>
49
50 #include "suncore.h"
51
52 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
53  * in a UART clock of 1.8462 MHz.
54  */
55 #define SU_BASE_BAUD    (1846200 / 16)
56
57 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
58 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
59
60 /*
61  * Here we define the default xmit fifo size used for each type of UART.
62  */
63 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
64         { "unknown",    1,      0 },
65         { "8250",       1,      0 },
66         { "16450",      1,      0 },
67         { "16550",      1,      0 },
68         { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
69         { "Cirrus",     1,      0 },
70         { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
71         { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
72         { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
73         { "Startech",   1,      0 },
74         { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
75         { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
76         { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
77         { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
78 };
79
80 struct uart_sunsu_port {
81         struct uart_port        port;
82         unsigned char           acr;
83         unsigned char           ier;
84         unsigned short          rev;
85         unsigned char           lcr;
86         unsigned int            lsr_break_flag;
87         unsigned int            cflag;
88
89         /* Probing information.  */
90         enum su_type            su_type;
91         unsigned int            type_probed;    /* XXX Stupid */
92         unsigned long           reg_size;
93
94 #ifdef CONFIG_SERIO
95         struct serio            serio;
96         int                     serio_open;
97 #endif
98 };
99
100 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
101 {
102         offset <<= up->port.regshift;
103
104         switch (up->port.iotype) {
105         case UPIO_HUB6:
106                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
107                 return inb(up->port.iobase + 1);
108
109         case UPIO_MEM:
110                 return readb(up->port.membase + offset);
111
112         default:
113                 return inb(up->port.iobase + offset);
114         }
115 }
116
117 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
118 {
119 #ifndef CONFIG_SPARC64
120         /*
121          * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
122          * connected with a gate then go to SlavIO. When IRQ4 goes tristated
123          * gate outputs a logical one. Since we use level triggered interrupts
124          * we have lockup and watchdog reset. We cannot mask IRQ because
125          * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
126          * This problem is similar to what Alpha people suffer, see serial.c.
127          */
128         if (offset == UART_MCR)
129                 value |= UART_MCR_OUT2;
130 #endif
131         offset <<= up->port.regshift;
132
133         switch (up->port.iotype) {
134         case UPIO_HUB6:
135                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
136                 outb(value, up->port.iobase + 1);
137                 break;
138
139         case UPIO_MEM:
140                 writeb(value, up->port.membase + offset);
141                 break;
142
143         default:
144                 outb(value, up->port.iobase + offset);
145         }
146 }
147
148 /*
149  * We used to support using pause I/O for certain machines.  We
150  * haven't supported this for a while, but just in case it's badly
151  * needed for certain old 386 machines, I've left these #define's
152  * in....
153  */
154 #define serial_inp(up, offset)          serial_in(up, offset)
155 #define serial_outp(up, offset, value)  serial_out(up, offset, value)
156
157
158 /*
159  * For the 16C950
160  */
161 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
162 {
163         serial_out(up, UART_SCR, offset);
164         serial_out(up, UART_ICR, value);
165 }
166
167 #if 0 /* Unused currently */
168 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
169 {
170         unsigned int value;
171
172         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
173         serial_out(up, UART_SCR, offset);
174         value = serial_in(up, UART_ICR);
175         serial_icr_write(up, UART_ACR, up->acr);
176
177         return value;
178 }
179 #endif
180
181 #ifdef CONFIG_SERIAL_8250_RSA
182 /*
183  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
184  * We set the port uart clock rate if we succeed.
185  */
186 static int __enable_rsa(struct uart_sunsu_port *up)
187 {
188         unsigned char mode;
189         int result;
190
191         mode = serial_inp(up, UART_RSA_MSR);
192         result = mode & UART_RSA_MSR_FIFO;
193
194         if (!result) {
195                 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
196                 mode = serial_inp(up, UART_RSA_MSR);
197                 result = mode & UART_RSA_MSR_FIFO;
198         }
199
200         if (result)
201                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
202
203         return result;
204 }
205
206 static void enable_rsa(struct uart_sunsu_port *up)
207 {
208         if (up->port.type == PORT_RSA) {
209                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
210                         spin_lock_irq(&up->port.lock);
211                         __enable_rsa(up);
212                         spin_unlock_irq(&up->port.lock);
213                 }
214                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
215                         serial_outp(up, UART_RSA_FRR, 0);
216         }
217 }
218
219 /*
220  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
221  * It is unknown why interrupts were disabled in here.  However,
222  * the caller is expected to preserve this behaviour by grabbing
223  * the spinlock before calling this function.
224  */
225 static void disable_rsa(struct uart_sunsu_port *up)
226 {
227         unsigned char mode;
228         int result;
229
230         if (up->port.type == PORT_RSA &&
231             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
232                 spin_lock_irq(&up->port.lock);
233
234                 mode = serial_inp(up, UART_RSA_MSR);
235                 result = !(mode & UART_RSA_MSR_FIFO);
236
237                 if (!result) {
238                         serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
239                         mode = serial_inp(up, UART_RSA_MSR);
240                         result = !(mode & UART_RSA_MSR_FIFO);
241                 }
242
243                 if (result)
244                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
245                 spin_unlock_irq(&up->port.lock);
246         }
247 }
248 #endif /* CONFIG_SERIAL_8250_RSA */
249
250 static inline void __stop_tx(struct uart_sunsu_port *p)
251 {
252         if (p->ier & UART_IER_THRI) {
253                 p->ier &= ~UART_IER_THRI;
254                 serial_out(p, UART_IER, p->ier);
255         }
256 }
257
258 static void sunsu_stop_tx(struct uart_port *port)
259 {
260         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
261
262         __stop_tx(up);
263
264         /*
265          * We really want to stop the transmitter from sending.
266          */
267         if (up->port.type == PORT_16C950) {
268                 up->acr |= UART_ACR_TXDIS;
269                 serial_icr_write(up, UART_ACR, up->acr);
270         }
271 }
272
273 static void sunsu_start_tx(struct uart_port *port)
274 {
275         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
276
277         if (!(up->ier & UART_IER_THRI)) {
278                 up->ier |= UART_IER_THRI;
279                 serial_out(up, UART_IER, up->ier);
280         }
281
282         /*
283          * Re-enable the transmitter if we disabled it.
284          */
285         if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
286                 up->acr &= ~UART_ACR_TXDIS;
287                 serial_icr_write(up, UART_ACR, up->acr);
288         }
289 }
290
291 static void sunsu_stop_rx(struct uart_port *port)
292 {
293         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
294
295         up->ier &= ~UART_IER_RLSI;
296         up->port.read_status_mask &= ~UART_LSR_DR;
297         serial_out(up, UART_IER, up->ier);
298 }
299
300 static void sunsu_enable_ms(struct uart_port *port)
301 {
302         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
303         unsigned long flags;
304
305         spin_lock_irqsave(&up->port.lock, flags);
306         up->ier |= UART_IER_MSI;
307         serial_out(up, UART_IER, up->ier);
308         spin_unlock_irqrestore(&up->port.lock, flags);
309 }
310
311 static struct tty_struct *
312 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
313 {
314         struct tty_struct *tty = up->port.state->port.tty;
315         unsigned char ch, flag;
316         int max_count = 256;
317         int saw_console_brk = 0;
318
319         do {
320                 ch = serial_inp(up, UART_RX);
321                 flag = TTY_NORMAL;
322                 up->port.icount.rx++;
323
324                 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
325                                        UART_LSR_FE | UART_LSR_OE))) {
326                         /*
327                          * For statistics only
328                          */
329                         if (*status & UART_LSR_BI) {
330                                 *status &= ~(UART_LSR_FE | UART_LSR_PE);
331                                 up->port.icount.brk++;
332                                 if (up->port.cons != NULL &&
333                                     up->port.line == up->port.cons->index)
334                                         saw_console_brk = 1;
335                                 /*
336                                  * We do the SysRQ and SAK checking
337                                  * here because otherwise the break
338                                  * may get masked by ignore_status_mask
339                                  * or read_status_mask.
340                                  */
341                                 if (uart_handle_break(&up->port))
342                                         goto ignore_char;
343                         } else if (*status & UART_LSR_PE)
344                                 up->port.icount.parity++;
345                         else if (*status & UART_LSR_FE)
346                                 up->port.icount.frame++;
347                         if (*status & UART_LSR_OE)
348                                 up->port.icount.overrun++;
349
350                         /*
351                          * Mask off conditions which should be ingored.
352                          */
353                         *status &= up->port.read_status_mask;
354
355                         if (up->port.cons != NULL &&
356                             up->port.line == up->port.cons->index) {
357                                 /* Recover the break flag from console xmit */
358                                 *status |= up->lsr_break_flag;
359                                 up->lsr_break_flag = 0;
360                         }
361
362                         if (*status & UART_LSR_BI) {
363                                 flag = TTY_BREAK;
364                         } else if (*status & UART_LSR_PE)
365                                 flag = TTY_PARITY;
366                         else if (*status & UART_LSR_FE)
367                                 flag = TTY_FRAME;
368                 }
369                 if (uart_handle_sysrq_char(&up->port, ch))
370                         goto ignore_char;
371                 if ((*status & up->port.ignore_status_mask) == 0)
372                         tty_insert_flip_char(tty, ch, flag);
373                 if (*status & UART_LSR_OE)
374                         /*
375                          * Overrun is special, since it's reported
376                          * immediately, and doesn't affect the current
377                          * character.
378                          */
379                          tty_insert_flip_char(tty, 0, TTY_OVERRUN);
380         ignore_char:
381                 *status = serial_inp(up, UART_LSR);
382         } while ((*status & UART_LSR_DR) && (max_count-- > 0));
383
384         if (saw_console_brk)
385                 sun_do_break();
386
387         return tty;
388 }
389
390 static void transmit_chars(struct uart_sunsu_port *up)
391 {
392         struct circ_buf *xmit = &up->port.state->xmit;
393         int count;
394
395         if (up->port.x_char) {
396                 serial_outp(up, UART_TX, up->port.x_char);
397                 up->port.icount.tx++;
398                 up->port.x_char = 0;
399                 return;
400         }
401         if (uart_tx_stopped(&up->port)) {
402                 sunsu_stop_tx(&up->port);
403                 return;
404         }
405         if (uart_circ_empty(xmit)) {
406                 __stop_tx(up);
407                 return;
408         }
409
410         count = up->port.fifosize;
411         do {
412                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
413                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
414                 up->port.icount.tx++;
415                 if (uart_circ_empty(xmit))
416                         break;
417         } while (--count > 0);
418
419         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
420                 uart_write_wakeup(&up->port);
421
422         if (uart_circ_empty(xmit))
423                 __stop_tx(up);
424 }
425
426 static void check_modem_status(struct uart_sunsu_port *up)
427 {
428         int status;
429
430         status = serial_in(up, UART_MSR);
431
432         if ((status & UART_MSR_ANY_DELTA) == 0)
433                 return;
434
435         if (status & UART_MSR_TERI)
436                 up->port.icount.rng++;
437         if (status & UART_MSR_DDSR)
438                 up->port.icount.dsr++;
439         if (status & UART_MSR_DDCD)
440                 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
441         if (status & UART_MSR_DCTS)
442                 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
443
444         wake_up_interruptible(&up->port.state->port.delta_msr_wait);
445 }
446
447 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
448 {
449         struct uart_sunsu_port *up = dev_id;
450         unsigned long flags;
451         unsigned char status;
452
453         spin_lock_irqsave(&up->port.lock, flags);
454
455         do {
456                 struct tty_struct *tty;
457
458                 status = serial_inp(up, UART_LSR);
459                 tty = NULL;
460                 if (status & UART_LSR_DR)
461                         tty = receive_chars(up, &status);
462                 check_modem_status(up);
463                 if (status & UART_LSR_THRE)
464                         transmit_chars(up);
465
466                 spin_unlock_irqrestore(&up->port.lock, flags);
467
468                 if (tty)
469                         tty_flip_buffer_push(tty);
470
471                 spin_lock_irqsave(&up->port.lock, flags);
472
473         } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
474
475         spin_unlock_irqrestore(&up->port.lock, flags);
476
477         return IRQ_HANDLED;
478 }
479
480 /* Separate interrupt handling path for keyboard/mouse ports.  */
481
482 static void
483 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
484                    unsigned int iflag, unsigned int quot);
485
486 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
487 {
488         unsigned int cur_cflag = up->cflag;
489         int quot, new_baud;
490
491         up->cflag &= ~CBAUD;
492         up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
493
494         quot = up->port.uartclk / (16 * new_baud);
495
496         sunsu_change_speed(&up->port, up->cflag, 0, quot);
497 }
498
499 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
500 {
501         do {
502                 unsigned char ch = serial_inp(up, UART_RX);
503
504                 /* Stop-A is handled by drivers/char/keyboard.c now. */
505                 if (up->su_type == SU_PORT_KBD) {
506 #ifdef CONFIG_SERIO
507                         serio_interrupt(&up->serio, ch, 0);
508 #endif
509                 } else if (up->su_type == SU_PORT_MS) {
510                         int ret = suncore_mouse_baud_detection(ch, is_break);
511
512                         switch (ret) {
513                         case 2:
514                                 sunsu_change_mouse_baud(up);
515                                 /* fallthru */
516                         case 1:
517                                 break;
518
519                         case 0:
520 #ifdef CONFIG_SERIO
521                                 serio_interrupt(&up->serio, ch, 0);
522 #endif
523                                 break;
524                         };
525                 }
526         } while (serial_in(up, UART_LSR) & UART_LSR_DR);
527 }
528
529 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
530 {
531         struct uart_sunsu_port *up = dev_id;
532
533         if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
534                 unsigned char status = serial_inp(up, UART_LSR);
535
536                 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
537                         receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
538         }
539
540         return IRQ_HANDLED;
541 }
542
543 static unsigned int sunsu_tx_empty(struct uart_port *port)
544 {
545         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
546         unsigned long flags;
547         unsigned int ret;
548
549         spin_lock_irqsave(&up->port.lock, flags);
550         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
551         spin_unlock_irqrestore(&up->port.lock, flags);
552
553         return ret;
554 }
555
556 static unsigned int sunsu_get_mctrl(struct uart_port *port)
557 {
558         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
559         unsigned char status;
560         unsigned int ret;
561
562         status = serial_in(up, UART_MSR);
563
564         ret = 0;
565         if (status & UART_MSR_DCD)
566                 ret |= TIOCM_CAR;
567         if (status & UART_MSR_RI)
568                 ret |= TIOCM_RNG;
569         if (status & UART_MSR_DSR)
570                 ret |= TIOCM_DSR;
571         if (status & UART_MSR_CTS)
572                 ret |= TIOCM_CTS;
573         return ret;
574 }
575
576 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
577 {
578         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
579         unsigned char mcr = 0;
580
581         if (mctrl & TIOCM_RTS)
582                 mcr |= UART_MCR_RTS;
583         if (mctrl & TIOCM_DTR)
584                 mcr |= UART_MCR_DTR;
585         if (mctrl & TIOCM_OUT1)
586                 mcr |= UART_MCR_OUT1;
587         if (mctrl & TIOCM_OUT2)
588                 mcr |= UART_MCR_OUT2;
589         if (mctrl & TIOCM_LOOP)
590                 mcr |= UART_MCR_LOOP;
591
592         serial_out(up, UART_MCR, mcr);
593 }
594
595 static void sunsu_break_ctl(struct uart_port *port, int break_state)
596 {
597         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
598         unsigned long flags;
599
600         spin_lock_irqsave(&up->port.lock, flags);
601         if (break_state == -1)
602                 up->lcr |= UART_LCR_SBC;
603         else
604                 up->lcr &= ~UART_LCR_SBC;
605         serial_out(up, UART_LCR, up->lcr);
606         spin_unlock_irqrestore(&up->port.lock, flags);
607 }
608
609 static int sunsu_startup(struct uart_port *port)
610 {
611         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
612         unsigned long flags;
613         int retval;
614
615         if (up->port.type == PORT_16C950) {
616                 /* Wake up and initialize UART */
617                 up->acr = 0;
618                 serial_outp(up, UART_LCR, 0xBF);
619                 serial_outp(up, UART_EFR, UART_EFR_ECB);
620                 serial_outp(up, UART_IER, 0);
621                 serial_outp(up, UART_LCR, 0);
622                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
623                 serial_outp(up, UART_LCR, 0xBF);
624                 serial_outp(up, UART_EFR, UART_EFR_ECB);
625                 serial_outp(up, UART_LCR, 0);
626         }
627
628 #ifdef CONFIG_SERIAL_8250_RSA
629         /*
630          * If this is an RSA port, see if we can kick it up to the
631          * higher speed clock.
632          */
633         enable_rsa(up);
634 #endif
635
636         /*
637          * Clear the FIFO buffers and disable them.
638          * (they will be reenabled in set_termios())
639          */
640         if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
641                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
642                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
643                                 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
644                 serial_outp(up, UART_FCR, 0);
645         }
646
647         /*
648          * Clear the interrupt registers.
649          */
650         (void) serial_inp(up, UART_LSR);
651         (void) serial_inp(up, UART_RX);
652         (void) serial_inp(up, UART_IIR);
653         (void) serial_inp(up, UART_MSR);
654
655         /*
656          * At this point, there's no way the LSR could still be 0xff;
657          * if it is, then bail out, because there's likely no UART
658          * here.
659          */
660         if (!(up->port.flags & UPF_BUGGY_UART) &&
661             (serial_inp(up, UART_LSR) == 0xff)) {
662                 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
663                 return -ENODEV;
664         }
665
666         if (up->su_type != SU_PORT_PORT) {
667                 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
668                                      IRQF_SHARED, su_typev[up->su_type], up);
669         } else {
670                 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
671                                      IRQF_SHARED, su_typev[up->su_type], up);
672         }
673         if (retval) {
674                 printk("su: Cannot register IRQ %d\n", up->port.irq);
675                 return retval;
676         }
677
678         /*
679          * Now, initialize the UART
680          */
681         serial_outp(up, UART_LCR, UART_LCR_WLEN8);
682
683         spin_lock_irqsave(&up->port.lock, flags);
684
685         up->port.mctrl |= TIOCM_OUT2;
686
687         sunsu_set_mctrl(&up->port, up->port.mctrl);
688         spin_unlock_irqrestore(&up->port.lock, flags);
689
690         /*
691          * Finally, enable interrupts.  Note: Modem status interrupts
692          * are set via set_termios(), which will be occurring imminently
693          * anyway, so we don't enable them here.
694          */
695         up->ier = UART_IER_RLSI | UART_IER_RDI;
696         serial_outp(up, UART_IER, up->ier);
697
698         if (up->port.flags & UPF_FOURPORT) {
699                 unsigned int icp;
700                 /*
701                  * Enable interrupts on the AST Fourport board
702                  */
703                 icp = (up->port.iobase & 0xfe0) | 0x01f;
704                 outb_p(0x80, icp);
705                 (void) inb_p(icp);
706         }
707
708         /*
709          * And clear the interrupt registers again for luck.
710          */
711         (void) serial_inp(up, UART_LSR);
712         (void) serial_inp(up, UART_RX);
713         (void) serial_inp(up, UART_IIR);
714         (void) serial_inp(up, UART_MSR);
715
716         return 0;
717 }
718
719 static void sunsu_shutdown(struct uart_port *port)
720 {
721         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
722         unsigned long flags;
723
724         /*
725          * Disable interrupts from this port
726          */
727         up->ier = 0;
728         serial_outp(up, UART_IER, 0);
729
730         spin_lock_irqsave(&up->port.lock, flags);
731         if (up->port.flags & UPF_FOURPORT) {
732                 /* reset interrupts on the AST Fourport board */
733                 inb((up->port.iobase & 0xfe0) | 0x1f);
734                 up->port.mctrl |= TIOCM_OUT1;
735         } else
736                 up->port.mctrl &= ~TIOCM_OUT2;
737
738         sunsu_set_mctrl(&up->port, up->port.mctrl);
739         spin_unlock_irqrestore(&up->port.lock, flags);
740
741         /*
742          * Disable break condition and FIFOs
743          */
744         serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
745         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
746                                   UART_FCR_CLEAR_RCVR |
747                                   UART_FCR_CLEAR_XMIT);
748         serial_outp(up, UART_FCR, 0);
749
750 #ifdef CONFIG_SERIAL_8250_RSA
751         /*
752          * Reset the RSA board back to 115kbps compat mode.
753          */
754         disable_rsa(up);
755 #endif
756
757         /*
758          * Read data port to reset things.
759          */
760         (void) serial_in(up, UART_RX);
761
762         free_irq(up->port.irq, up);
763 }
764
765 static void
766 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
767                    unsigned int iflag, unsigned int quot)
768 {
769         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
770         unsigned char cval, fcr = 0;
771         unsigned long flags;
772
773         switch (cflag & CSIZE) {
774         case CS5:
775                 cval = 0x00;
776                 break;
777         case CS6:
778                 cval = 0x01;
779                 break;
780         case CS7:
781                 cval = 0x02;
782                 break;
783         default:
784         case CS8:
785                 cval = 0x03;
786                 break;
787         }
788
789         if (cflag & CSTOPB)
790                 cval |= 0x04;
791         if (cflag & PARENB)
792                 cval |= UART_LCR_PARITY;
793         if (!(cflag & PARODD))
794                 cval |= UART_LCR_EPAR;
795 #ifdef CMSPAR
796         if (cflag & CMSPAR)
797                 cval |= UART_LCR_SPAR;
798 #endif
799
800         /*
801          * Work around a bug in the Oxford Semiconductor 952 rev B
802          * chip which causes it to seriously miscalculate baud rates
803          * when DLL is 0.
804          */
805         if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
806             up->rev == 0x5201)
807                 quot ++;
808
809         if (uart_config[up->port.type].flags & UART_USE_FIFO) {
810                 if ((up->port.uartclk / quot) < (2400 * 16))
811                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
812 #ifdef CONFIG_SERIAL_8250_RSA
813                 else if (up->port.type == PORT_RSA)
814                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
815 #endif
816                 else
817                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
818         }
819         if (up->port.type == PORT_16750)
820                 fcr |= UART_FCR7_64BYTE;
821
822         /*
823          * Ok, we're now changing the port state.  Do it with
824          * interrupts disabled.
825          */
826         spin_lock_irqsave(&up->port.lock, flags);
827
828         /*
829          * Update the per-port timeout.
830          */
831         uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
832
833         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
834         if (iflag & INPCK)
835                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
836         if (iflag & (BRKINT | PARMRK))
837                 up->port.read_status_mask |= UART_LSR_BI;
838
839         /*
840          * Characteres to ignore
841          */
842         up->port.ignore_status_mask = 0;
843         if (iflag & IGNPAR)
844                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
845         if (iflag & IGNBRK) {
846                 up->port.ignore_status_mask |= UART_LSR_BI;
847                 /*
848                  * If we're ignoring parity and break indicators,
849                  * ignore overruns too (for real raw support).
850                  */
851                 if (iflag & IGNPAR)
852                         up->port.ignore_status_mask |= UART_LSR_OE;
853         }
854
855         /*
856          * ignore all characters if CREAD is not set
857          */
858         if ((cflag & CREAD) == 0)
859                 up->port.ignore_status_mask |= UART_LSR_DR;
860
861         /*
862          * CTS flow control flag and modem status interrupts
863          */
864         up->ier &= ~UART_IER_MSI;
865         if (UART_ENABLE_MS(&up->port, cflag))
866                 up->ier |= UART_IER_MSI;
867
868         serial_out(up, UART_IER, up->ier);
869
870         if (uart_config[up->port.type].flags & UART_STARTECH) {
871                 serial_outp(up, UART_LCR, 0xBF);
872                 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
873         }
874         serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
875         serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
876         serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
877         if (up->port.type == PORT_16750)
878                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
879         serial_outp(up, UART_LCR, cval);                /* reset DLAB */
880         up->lcr = cval;                                 /* Save LCR */
881         if (up->port.type != PORT_16750) {
882                 if (fcr & UART_FCR_ENABLE_FIFO) {
883                         /* emulated UARTs (Lucent Venus 167x) need two steps */
884                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
885                 }
886                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
887         }
888
889         up->cflag = cflag;
890
891         spin_unlock_irqrestore(&up->port.lock, flags);
892 }
893
894 static void
895 sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
896                   struct ktermios *old)
897 {
898         unsigned int baud, quot;
899
900         /*
901          * Ask the core to calculate the divisor for us.
902          */
903         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
904         quot = uart_get_divisor(port, baud);
905
906         sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
907 }
908
909 static void sunsu_release_port(struct uart_port *port)
910 {
911 }
912
913 static int sunsu_request_port(struct uart_port *port)
914 {
915         return 0;
916 }
917
918 static void sunsu_config_port(struct uart_port *port, int flags)
919 {
920         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
921
922         if (flags & UART_CONFIG_TYPE) {
923                 /*
924                  * We are supposed to call autoconfig here, but this requires
925                  * splitting all the OBP probing crap from the UART probing.
926                  * We'll do it when we kill sunsu.c altogether.
927                  */
928                 port->type = up->type_probed;   /* XXX */
929         }
930 }
931
932 static int
933 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
934 {
935         return -EINVAL;
936 }
937
938 static const char *
939 sunsu_type(struct uart_port *port)
940 {
941         int type = port->type;
942
943         if (type >= ARRAY_SIZE(uart_config))
944                 type = 0;
945         return uart_config[type].name;
946 }
947
948 static struct uart_ops sunsu_pops = {
949         .tx_empty       = sunsu_tx_empty,
950         .set_mctrl      = sunsu_set_mctrl,
951         .get_mctrl      = sunsu_get_mctrl,
952         .stop_tx        = sunsu_stop_tx,
953         .start_tx       = sunsu_start_tx,
954         .stop_rx        = sunsu_stop_rx,
955         .enable_ms      = sunsu_enable_ms,
956         .break_ctl      = sunsu_break_ctl,
957         .startup        = sunsu_startup,
958         .shutdown       = sunsu_shutdown,
959         .set_termios    = sunsu_set_termios,
960         .type           = sunsu_type,
961         .release_port   = sunsu_release_port,
962         .request_port   = sunsu_request_port,
963         .config_port    = sunsu_config_port,
964         .verify_port    = sunsu_verify_port,
965 };
966
967 #define UART_NR 4
968
969 static struct uart_sunsu_port sunsu_ports[UART_NR];
970
971 #ifdef CONFIG_SERIO
972
973 static DEFINE_SPINLOCK(sunsu_serio_lock);
974
975 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
976 {
977         struct uart_sunsu_port *up = serio->port_data;
978         unsigned long flags;
979         int lsr;
980
981         spin_lock_irqsave(&sunsu_serio_lock, flags);
982
983         do {
984                 lsr = serial_in(up, UART_LSR);
985         } while (!(lsr & UART_LSR_THRE));
986
987         /* Send the character out. */
988         serial_out(up, UART_TX, ch);
989
990         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
991
992         return 0;
993 }
994
995 static int sunsu_serio_open(struct serio *serio)
996 {
997         struct uart_sunsu_port *up = serio->port_data;
998         unsigned long flags;
999         int ret;
1000
1001         spin_lock_irqsave(&sunsu_serio_lock, flags);
1002         if (!up->serio_open) {
1003                 up->serio_open = 1;
1004                 ret = 0;
1005         } else
1006                 ret = -EBUSY;
1007         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1008
1009         return ret;
1010 }
1011
1012 static void sunsu_serio_close(struct serio *serio)
1013 {
1014         struct uart_sunsu_port *up = serio->port_data;
1015         unsigned long flags;
1016
1017         spin_lock_irqsave(&sunsu_serio_lock, flags);
1018         up->serio_open = 0;
1019         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1020 }
1021
1022 #endif /* CONFIG_SERIO */
1023
1024 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1025 {
1026         unsigned char status1, status2, scratch, scratch2, scratch3;
1027         unsigned char save_lcr, save_mcr;
1028         unsigned long flags;
1029
1030         if (up->su_type == SU_PORT_NONE)
1031                 return;
1032
1033         up->type_probed = PORT_UNKNOWN;
1034         up->port.iotype = UPIO_MEM;
1035
1036         spin_lock_irqsave(&up->port.lock, flags);
1037
1038         if (!(up->port.flags & UPF_BUGGY_UART)) {
1039                 /*
1040                  * Do a simple existence test first; if we fail this, there's
1041                  * no point trying anything else.
1042                  *
1043                  * 0x80 is used as a nonsense port to prevent against false
1044                  * positives due to ISA bus float.  The assumption is that
1045                  * 0x80 is a non-existent port; which should be safe since
1046                  * include/asm/io.h also makes this assumption.
1047                  */
1048                 scratch = serial_inp(up, UART_IER);
1049                 serial_outp(up, UART_IER, 0);
1050 #ifdef __i386__
1051                 outb(0xff, 0x080);
1052 #endif
1053                 scratch2 = serial_inp(up, UART_IER);
1054                 serial_outp(up, UART_IER, 0x0f);
1055 #ifdef __i386__
1056                 outb(0, 0x080);
1057 #endif
1058                 scratch3 = serial_inp(up, UART_IER);
1059                 serial_outp(up, UART_IER, scratch);
1060                 if (scratch2 != 0 || scratch3 != 0x0F)
1061                         goto out;       /* We failed; there's nothing here */
1062         }
1063
1064         save_mcr = serial_in(up, UART_MCR);
1065         save_lcr = serial_in(up, UART_LCR);
1066
1067         /* 
1068          * Check to see if a UART is really there.  Certain broken
1069          * internal modems based on the Rockwell chipset fail this
1070          * test, because they apparently don't implement the loopback
1071          * test mode.  So this test is skipped on the COM 1 through
1072          * COM 4 ports.  This *should* be safe, since no board
1073          * manufacturer would be stupid enough to design a board
1074          * that conflicts with COM 1-4 --- we hope!
1075          */
1076         if (!(up->port.flags & UPF_SKIP_TEST)) {
1077                 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1078                 status1 = serial_inp(up, UART_MSR) & 0xF0;
1079                 serial_outp(up, UART_MCR, save_mcr);
1080                 if (status1 != 0x90)
1081                         goto out;       /* We failed loopback test */
1082         }
1083         serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1084         serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1085         serial_outp(up, UART_LCR, 0);
1086         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1087         scratch = serial_in(up, UART_IIR) >> 6;
1088         switch (scratch) {
1089                 case 0:
1090                         up->port.type = PORT_16450;
1091                         break;
1092                 case 1:
1093                         up->port.type = PORT_UNKNOWN;
1094                         break;
1095                 case 2:
1096                         up->port.type = PORT_16550;
1097                         break;
1098                 case 3:
1099                         up->port.type = PORT_16550A;
1100                         break;
1101         }
1102         if (up->port.type == PORT_16550A) {
1103                 /* Check for Startech UART's */
1104                 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1105                 if (serial_in(up, UART_EFR) == 0) {
1106                         up->port.type = PORT_16650;
1107                 } else {
1108                         serial_outp(up, UART_LCR, 0xBF);
1109                         if (serial_in(up, UART_EFR) == 0)
1110                                 up->port.type = PORT_16650V2;
1111                 }
1112         }
1113         if (up->port.type == PORT_16550A) {
1114                 /* Check for TI 16750 */
1115                 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1116                 serial_outp(up, UART_FCR,
1117                             UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1118                 scratch = serial_in(up, UART_IIR) >> 5;
1119                 if (scratch == 7) {
1120                         /*
1121                          * If this is a 16750, and not a cheap UART
1122                          * clone, then it should only go into 64 byte
1123                          * mode if the UART_FCR7_64BYTE bit was set
1124                          * while UART_LCR_DLAB was latched.
1125                          */
1126                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1127                         serial_outp(up, UART_LCR, 0);
1128                         serial_outp(up, UART_FCR,
1129                                     UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1130                         scratch = serial_in(up, UART_IIR) >> 5;
1131                         if (scratch == 6)
1132                                 up->port.type = PORT_16750;
1133                 }
1134                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1135         }
1136         serial_outp(up, UART_LCR, save_lcr);
1137         if (up->port.type == PORT_16450) {
1138                 scratch = serial_in(up, UART_SCR);
1139                 serial_outp(up, UART_SCR, 0xa5);
1140                 status1 = serial_in(up, UART_SCR);
1141                 serial_outp(up, UART_SCR, 0x5a);
1142                 status2 = serial_in(up, UART_SCR);
1143                 serial_outp(up, UART_SCR, scratch);
1144
1145                 if ((status1 != 0xa5) || (status2 != 0x5a))
1146                         up->port.type = PORT_8250;
1147         }
1148
1149         up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1150
1151         if (up->port.type == PORT_UNKNOWN)
1152                 goto out;
1153         up->type_probed = up->port.type;        /* XXX */
1154
1155         /*
1156          * Reset the UART.
1157          */
1158 #ifdef CONFIG_SERIAL_8250_RSA
1159         if (up->port.type == PORT_RSA)
1160                 serial_outp(up, UART_RSA_FRR, 0);
1161 #endif
1162         serial_outp(up, UART_MCR, save_mcr);
1163         serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1164                                      UART_FCR_CLEAR_RCVR |
1165                                      UART_FCR_CLEAR_XMIT));
1166         serial_outp(up, UART_FCR, 0);
1167         (void)serial_in(up, UART_RX);
1168         serial_outp(up, UART_IER, 0);
1169
1170 out:
1171         spin_unlock_irqrestore(&up->port.lock, flags);
1172 }
1173
1174 static struct uart_driver sunsu_reg = {
1175         .owner                  = THIS_MODULE,
1176         .driver_name            = "sunsu",
1177         .dev_name               = "ttyS",
1178         .major                  = TTY_MAJOR,
1179 };
1180
1181 static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1182 {
1183         int quot, baud;
1184 #ifdef CONFIG_SERIO
1185         struct serio *serio;
1186 #endif
1187
1188         if (up->su_type == SU_PORT_KBD) {
1189                 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1190                 baud = 1200;
1191         } else {
1192                 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1193                 baud = 4800;
1194         }
1195         quot = up->port.uartclk / (16 * baud);
1196
1197         sunsu_autoconfig(up);
1198         if (up->port.type == PORT_UNKNOWN)
1199                 return -ENODEV;
1200
1201         printk("%s: %s port at %llx, irq %u\n",
1202                to_of_device(up->port.dev)->node->full_name,
1203                (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1204                (unsigned long long) up->port.mapbase,
1205                up->port.irq);
1206
1207 #ifdef CONFIG_SERIO
1208         serio = &up->serio;
1209         serio->port_data = up;
1210
1211         serio->id.type = SERIO_RS232;
1212         if (up->su_type == SU_PORT_KBD) {
1213                 serio->id.proto = SERIO_SUNKBD;
1214                 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1215         } else {
1216                 serio->id.proto = SERIO_SUN;
1217                 serio->id.extra = 1;
1218                 strlcpy(serio->name, "sums", sizeof(serio->name));
1219         }
1220         strlcpy(serio->phys,
1221                 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1222                 sizeof(serio->phys));
1223
1224         serio->write = sunsu_serio_write;
1225         serio->open = sunsu_serio_open;
1226         serio->close = sunsu_serio_close;
1227         serio->dev.parent = up->port.dev;
1228
1229         serio_register_port(serio);
1230 #endif
1231
1232         sunsu_change_speed(&up->port, up->cflag, 0, quot);
1233
1234         sunsu_startup(&up->port);
1235         return 0;
1236 }
1237
1238 /*
1239  * ------------------------------------------------------------
1240  * Serial console driver
1241  * ------------------------------------------------------------
1242  */
1243
1244 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1245
1246 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1247
1248 /*
1249  *      Wait for transmitter & holding register to empty
1250  */
1251 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1252 {
1253         unsigned int status, tmout = 10000;
1254
1255         /* Wait up to 10ms for the character(s) to be sent. */
1256         do {
1257                 status = serial_in(up, UART_LSR);
1258
1259                 if (status & UART_LSR_BI)
1260                         up->lsr_break_flag = UART_LSR_BI;
1261
1262                 if (--tmout == 0)
1263                         break;
1264                 udelay(1);
1265         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1266
1267         /* Wait up to 1s for flow control if necessary */
1268         if (up->port.flags & UPF_CONS_FLOW) {
1269                 tmout = 1000000;
1270                 while (--tmout &&
1271                        ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1272                         udelay(1);
1273         }
1274 }
1275
1276 static void sunsu_console_putchar(struct uart_port *port, int ch)
1277 {
1278         struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
1279
1280         wait_for_xmitr(up);
1281         serial_out(up, UART_TX, ch);
1282 }
1283
1284 /*
1285  *      Print a string to the serial port trying not to disturb
1286  *      any possible real use of the port...
1287  */
1288 static void sunsu_console_write(struct console *co, const char *s,
1289                                 unsigned int count)
1290 {
1291         struct uart_sunsu_port *up = &sunsu_ports[co->index];
1292         unsigned long flags;
1293         unsigned int ier;
1294         int locked = 1;
1295
1296         local_irq_save(flags);
1297         if (up->port.sysrq) {
1298                 locked = 0;
1299         } else if (oops_in_progress) {
1300                 locked = spin_trylock(&up->port.lock);
1301         } else
1302                 spin_lock(&up->port.lock);
1303
1304         /*
1305          *      First save the UER then disable the interrupts
1306          */
1307         ier = serial_in(up, UART_IER);
1308         serial_out(up, UART_IER, 0);
1309
1310         uart_console_write(&up->port, s, count, sunsu_console_putchar);
1311
1312         /*
1313          *      Finally, wait for transmitter to become empty
1314          *      and restore the IER
1315          */
1316         wait_for_xmitr(up);
1317         serial_out(up, UART_IER, ier);
1318
1319         if (locked)
1320                 spin_unlock(&up->port.lock);
1321         local_irq_restore(flags);
1322 }
1323
1324 /*
1325  *      Setup initial baud/bits/parity. We do two things here:
1326  *      - construct a cflag setting for the first su_open()
1327  *      - initialize the serial port
1328  *      Return non-zero if we didn't find a serial port.
1329  */
1330 static int __init sunsu_console_setup(struct console *co, char *options)
1331 {
1332         struct uart_port *port;
1333         int baud = 9600;
1334         int bits = 8;
1335         int parity = 'n';
1336         int flow = 'n';
1337
1338         printk("Console: ttyS%d (SU)\n",
1339                (sunsu_reg.minor - 64) + co->index);
1340
1341         /*
1342          * Check whether an invalid uart number has been specified, and
1343          * if so, search for the first available port that does have
1344          * console support.
1345          */
1346         if (co->index >= UART_NR)
1347                 co->index = 0;
1348         port = &sunsu_ports[co->index].port;
1349
1350         /*
1351          * Temporary fix.
1352          */
1353         spin_lock_init(&port->lock);
1354
1355         if (options)
1356                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1357
1358         return uart_set_options(port, co, baud, parity, bits, flow);
1359 }
1360
1361 static struct console sunsu_console = {
1362         .name   =       "ttyS",
1363         .write  =       sunsu_console_write,
1364         .device =       uart_console_device,
1365         .setup  =       sunsu_console_setup,
1366         .flags  =       CON_PRINTBUFFER,
1367         .index  =       -1,
1368         .data   =       &sunsu_reg,
1369 };
1370
1371 /*
1372  *      Register console.
1373  */
1374
1375 static inline struct console *SUNSU_CONSOLE(void)
1376 {
1377         return &sunsu_console;
1378 }
1379 #else
1380 #define SUNSU_CONSOLE()                 (NULL)
1381 #define sunsu_serial_console_init()     do { } while (0)
1382 #endif
1383
1384 static enum su_type __devinit su_get_type(struct device_node *dp)
1385 {
1386         struct device_node *ap = of_find_node_by_path("/aliases");
1387
1388         if (ap) {
1389                 const char *keyb = of_get_property(ap, "keyboard", NULL);
1390                 const char *ms = of_get_property(ap, "mouse", NULL);
1391
1392                 if (keyb) {
1393                         if (dp == of_find_node_by_path(keyb))
1394                                 return SU_PORT_KBD;
1395                 }
1396                 if (ms) {
1397                         if (dp == of_find_node_by_path(ms))
1398                                 return SU_PORT_MS;
1399                 }
1400         }
1401
1402         return SU_PORT_PORT;
1403 }
1404
1405 static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
1406 {
1407         static int inst;
1408         struct device_node *dp = op->node;
1409         struct uart_sunsu_port *up;
1410         struct resource *rp;
1411         enum su_type type;
1412         int err;
1413
1414         type = su_get_type(dp);
1415         if (type == SU_PORT_PORT) {
1416                 if (inst >= UART_NR)
1417                         return -EINVAL;
1418                 up = &sunsu_ports[inst];
1419         } else {
1420                 up = kzalloc(sizeof(*up), GFP_KERNEL);
1421                 if (!up)
1422                         return -ENOMEM;
1423         }
1424
1425         up->port.line = inst;
1426
1427         spin_lock_init(&up->port.lock);
1428
1429         up->su_type = type;
1430
1431         rp = &op->resource[0];
1432         up->port.mapbase = rp->start;
1433         up->reg_size = (rp->end - rp->start) + 1;
1434         up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1435         if (!up->port.membase) {
1436                 if (type != SU_PORT_PORT)
1437                         kfree(up);
1438                 return -ENOMEM;
1439         }
1440
1441         up->port.irq = op->irqs[0];
1442
1443         up->port.dev = &op->dev;
1444
1445         up->port.type = PORT_UNKNOWN;
1446         up->port.uartclk = (SU_BASE_BAUD * 16);
1447
1448         err = 0;
1449         if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1450                 err = sunsu_kbd_ms_init(up);
1451                 if (err) {
1452                         kfree(up);
1453                         goto out_unmap;
1454                 }
1455                 dev_set_drvdata(&op->dev, up);
1456
1457                 return 0;
1458         }
1459
1460         up->port.flags |= UPF_BOOT_AUTOCONF;
1461
1462         sunsu_autoconfig(up);
1463
1464         err = -ENODEV;
1465         if (up->port.type == PORT_UNKNOWN)
1466                 goto out_unmap;
1467
1468         up->port.ops = &sunsu_pops;
1469
1470         sunserial_console_match(SUNSU_CONSOLE(), dp,
1471                                 &sunsu_reg, up->port.line,
1472                                 false);
1473         err = uart_add_one_port(&sunsu_reg, &up->port);
1474         if (err)
1475                 goto out_unmap;
1476
1477         dev_set_drvdata(&op->dev, up);
1478
1479         inst++;
1480
1481         return 0;
1482
1483 out_unmap:
1484         of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1485         return err;
1486 }
1487
1488 static int __devexit su_remove(struct of_device *op)
1489 {
1490         struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
1491
1492         if (up->su_type == SU_PORT_MS ||
1493             up->su_type == SU_PORT_KBD) {
1494 #ifdef CONFIG_SERIO
1495                 serio_unregister_port(&up->serio);
1496 #endif
1497                 kfree(up);
1498         } else if (up->port.type != PORT_UNKNOWN) {
1499                 uart_remove_one_port(&sunsu_reg, &up->port);
1500         }
1501
1502         if (up->port.membase)
1503                 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1504
1505         dev_set_drvdata(&op->dev, NULL);
1506
1507         return 0;
1508 }
1509
1510 static const struct of_device_id su_match[] = {
1511         {
1512                 .name = "su",
1513         },
1514         {
1515                 .name = "su_pnp",
1516         },
1517         {
1518                 .name = "serial",
1519                 .compatible = "su",
1520         },
1521         {
1522                 .type = "serial",
1523                 .compatible = "su",
1524         },
1525         {},
1526 };
1527 MODULE_DEVICE_TABLE(of, su_match);
1528
1529 static struct of_platform_driver su_driver = {
1530         .name           = "su",
1531         .match_table    = su_match,
1532         .probe          = su_probe,
1533         .remove         = __devexit_p(su_remove),
1534 };
1535
1536 static int __init sunsu_init(void)
1537 {
1538         struct device_node *dp;
1539         int err;
1540         int num_uart = 0;
1541
1542         for_each_node_by_name(dp, "su") {
1543                 if (su_get_type(dp) == SU_PORT_PORT)
1544                         num_uart++;
1545         }
1546         for_each_node_by_name(dp, "su_pnp") {
1547                 if (su_get_type(dp) == SU_PORT_PORT)
1548                         num_uart++;
1549         }
1550         for_each_node_by_name(dp, "serial") {
1551                 if (of_device_is_compatible(dp, "su")) {
1552                         if (su_get_type(dp) == SU_PORT_PORT)
1553                                 num_uart++;
1554                 }
1555         }
1556         for_each_node_by_type(dp, "serial") {
1557                 if (of_device_is_compatible(dp, "su")) {
1558                         if (su_get_type(dp) == SU_PORT_PORT)
1559                                 num_uart++;
1560                 }
1561         }
1562
1563         if (num_uart) {
1564                 err = sunserial_register_minors(&sunsu_reg, num_uart);
1565                 if (err)
1566                         return err;
1567         }
1568
1569         err = of_register_driver(&su_driver, &of_bus_type);
1570         if (err && num_uart)
1571                 sunserial_unregister_minors(&sunsu_reg, num_uart);
1572
1573         return err;
1574 }
1575
1576 static void __exit sunsu_exit(void)
1577 {
1578         if (sunsu_reg.nr)
1579                 sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1580 }
1581
1582 module_init(sunsu_init);
1583 module_exit(sunsu_exit);
1584
1585 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1586 MODULE_DESCRIPTION("Sun SU serial port driver");
1587 MODULE_VERSION("2.0");
1588 MODULE_LICENSE("GPL");