drm/i915: pipelined fencing, part 1: fence stealing
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 12 Feb 2010 08:10:04 +0000 (09:10 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 2 Mar 2010 22:52:55 +0000 (23:52 +0100)
commit462b4215f0451d0d53df576b8dabfd4ceff32fb1
tree3436b729b45ff9f9ea4b4e194ab70d445bf7102b
parent791c7dfd38d53718b9c1ddcc51160bcc6fe454bc
drm/i915: pipelined fencing, part 1: fence stealing

This is mostly just infrastructure to thread the pipelined
argument through all relevant functions. Nothing is really
pipelined, yet, because i915_gem_object_get_fence_reg waits
for the fenced gpu access when pipelined == 1.

Pipelined fence clearing is a no-op because we'll overwrite
the fence reg anyway in i915_gem_object_get_fence_reg. The only
other caller of i915_gem_clear_fence_reg is the unbind code,
which is always synchronous.

Only mark execbuffer fences as pipelined for now and but a FIXME
comment for the pageflip stuff. Doing pipelined fencing for pageflip
needs some more usage tracking and I'm not sure this is worth it
for the fence will be pinned for an indetermined long time.

v2: Change clear_fence in i915_gem_object_unbind to put_fence.
With the pipelining it 'll be no longer sufficient to simply clear
the fence reg, some more synchronization well be needed later.

v3: Adapt to Sandybridge support.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_tiling.c
drivers/gpu/drm/i915/intel_display.c