OMAP3: SDRC: add timing data for Hynix H8KDS0UN0MER-4EM
authorRanjith Lohithakshan <ranjithl@ti.com>
Mon, 3 May 2010 10:06:58 +0000 (15:36 +0530)
committerRanjith Lohithakshan <ranjithl@ti.com>
Mon, 3 May 2010 11:08:20 +0000 (16:38 +0530)
commit660b94838a7bc7ce4626dedb7acedacb5367a61a
treedd37231db624bb3afb413ad84d479f185748cc6b
parent2a86de92614dee2eac7f8aa85aa91026e371dd14
OMAP3: SDRC: add timing data for Hynix H8KDS0UN0MER-4EM

Add timing data for Hynix H8KDS0UN0MER-4EM SDRAM chip. This chip is used
on the OMAP3 EVM boards with DM3730 SOM's.

Currently, timing data for 200MHz SDRC rate is only available. The 100MHz
data will be added in a subsequent patch.

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
arch/arm/mach-omap2/board-omap3evm.c
arch/arm/mach-omap2/sdram-hynix-h8kds0un0mer-4em.h [new file with mode: 0644]