am335x:u-boot-am33x.git
5 years agoam335x: ddr_defs: Update EMIF parameters
Vaibhav Bedia [Fri, 20 Apr 2012 07:58:16 +0000 (13:28 +0530)]
am335x: ddr_defs: Update EMIF parameters

EMIF parameters are calculated based on the AC timing
parameters from the SDRAM datasheet and the DDR frequency.

Current values for these paramters in AM335x U-Boot code,
though reliable, are not fully optimal. The most optimal
settings can be derived based on the guidelines published
at [1]. A pre-computed set of values with the most optimum
settings for AM335x EVM and BeagleBone can be found at [2].

[1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
[2] http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#AM335x

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
5 years agoti81xx: cpsw: cpdma bug fix where dma stops in bursty network
Mugunthan V N [Tue, 24 Apr 2012 02:36:01 +0000 (08:06 +0530)]
ti81xx: cpsw: cpdma bug fix where dma stops in bursty network

When there is a busty network, CPDMA completed all the desc before driver
services the desc and hdp goes to NULL as there is no free rx desc. Once this
situation occurs, cpsw driver doesn't have a mechanism to restart DMA and
driver will not receive any further packet until cpsw re-init happens.

This patch fixes the issue with restarting the DMA engine with writing hdp
when hdp is NULL and have a free rx desc.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
5 years agoam335x: cpsw: Add initial cpsw support for EVM-SK
Satyanarayana, Sandhya [Tue, 8 May 2012 13:17:40 +0000 (18:47 +0530)]
am335x: cpsw: Add initial cpsw support for EVM-SK

This patch adds initial support for cpsw on AM335x-SK.
PinMux for RGMII1 and RGMII2 are set.
PHY IDs for both PHYs and RGMII mode selected by default
holds good for SK Board.

Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: add initial support for EVM-SK
Hebbar, Gururaja [Tue, 8 May 2012 13:17:39 +0000 (18:47 +0530)]
am335x: add initial support for EVM-SK

This patch adds initial support new EVM-Starter Kit (EVM-SK).
Only board detection support is added.

Todo:
Currently RTC code is causing board to hang. In order to move forward
presently its been disabled. Need to debug and resolve this issue.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: Add support for DDR3
Satyanarayana, Sandhya [Tue, 8 May 2012 13:17:38 +0000 (18:47 +0530)]
am335x: Add support for DDR3

This patch adds DDR3 support to AM335x.
DDR3 support is required for AM335x-SK Board.

Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Patil, Rachna <rachna@ti.com>
5 years agoam335x: setup ddr pll's when configuring ddr emif registers
Hebbar, Gururaja [Tue, 8 May 2012 13:17:37 +0000 (18:47 +0530)]
am335x: setup ddr pll's when configuring ddr emif registers

Different DDR's are run at different frequency (and may be on differents
boards as-well). DDR2 on EVM, BB = 266MHz, DDR3 on EVM-SK = 303 MHz.

So this patch moves the ddr pll init to ddr emif register configuration
stage.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: Make way for DDR3
Satyanarayana, Sandhya [Tue, 8 May 2012 13:17:36 +0000 (18:47 +0530)]
am335x: Make way for DDR3

The existing DDR2 related defines have been renamed
so as to contain the string "DDR2" and functions to
contain the string "ddr2".

This will make adding DDR3 support to AM335x easier.

Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: move board detection to early stage
Hebbar, Gururaja [Tue, 8 May 2012 13:17:35 +0000 (18:47 +0530)]
am335x: move board detection to early stage

This patch moves the eeprom-based board detection to early stages. This
helps in setting up different ddr in different boards (EVM =DDR2, EVM-SK
= DDR3).

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: move i2c pin-mux variables to .data section
Hebbar, Gururaja [Tue, 8 May 2012 13:17:34 +0000 (18:47 +0530)]
am335x: move i2c pin-mux variables to .data section

i2c api (probe, read) may be called at early stages i.e., even before
relocation. So set up i2c pin-mux variables into proper .data sections.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agodrivers/i2c/omap24xx_i2c.c: part 2 move all local variables to SRAM
Hebbar, Gururaja [Tue, 8 May 2012 13:17:33 +0000 (18:47 +0530)]
drivers/i2c/omap24xx_i2c.c: part 2 move all local variables to SRAM

I2C module may be called even before relocation. By this patch it is
ensured that all variables used by omap24xx_i2c.c are located in SRAM.

This patch is based on the upstream patch. the same is applied for
am335x part of driver as well.

http://git.denx.de/?p=u-boot.git;a=commitdiff;
h=0b620ec97e05ddb09714d127a7880333fc4008fb

drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agodrivers/i2c/omap24xx_i2c.c: move all local variables to SRAM
Andreas Müller [Tue, 8 May 2012 13:17:32 +0000 (18:47 +0530)]
drivers/i2c/omap24xx_i2c.c: move all local variables to SRAM

At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately
this pin is also used for revision detection. Therefore we need to send
shut-up to TWL4030 to avoid reading wrong revision. In SPL this must
be done before SDRAM is set up because the type of SDRAM is revision dependent.
By this patch it is ensured that all variables used by omap24xx_i2c.c are
located in SRAM.

Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: correct rtc clock enable checking
Hebbar, Gururaja [Tue, 8 May 2012 13:17:31 +0000 (18:47 +0530)]
am335x: correct rtc clock enable checking

SPI0 clock was checked for readyness instead of RTC. This patch corrects
the same.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: Remove legacy 13x13 board support
Hebbar, Gururaja [Tue, 8 May 2012 13:17:30 +0000 (18:47 +0530)]
am335x: Remove legacy 13x13 board support

Support for 13x13 board was added during Bring-up process. Now this
board isn't used by anyone anymore. So remove the code as well.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x: use readl & writel instead of __raw_readl & __raw_writel
Hebbar, Gururaja [Tue, 8 May 2012 13:17:29 +0000 (18:47 +0530)]
am335x: use readl & writel instead of __raw_readl & __raw_writel

On ARMv7 cores, device memory mapped as Normal Non-cacheable, may not
guarantee ordered access causing failures in device drivers that do not
use the mandatory memory barriers. readl & writel versions contain
necessary memory barriers for this.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
5 years agoam335x evm: Add am335x_evm_spiboot target
Tom Rini [Thu, 5 Apr 2012 23:14:02 +0000 (16:14 -0700)]
am335x evm: Add am335x_evm_spiboot target

This target will disable SPL for SD/MMC and NAND and place the
environment in SPI flash rather than NAND.

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoam335x evm: Add SPI SPL as an option
Tom Rini [Thu, 5 Apr 2012 22:54:58 +0000 (15:54 -0700)]
am335x evm: Add SPI SPL as an option

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoti81xx: Add SPI SPL support
Tom Rini [Thu, 5 Apr 2012 22:54:17 +0000 (15:54 -0700)]
ti81xx: Add SPI SPL support

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoomapimage: Add support for byteswapped SPI images
Tom Rini [Thu, 5 Apr 2012 22:54:08 +0000 (15:54 -0700)]
omapimage: Add support for byteswapped SPI images

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoVarious: Add SPL malloc defines
Tom Rini [Thu, 5 Apr 2012 21:36:15 +0000 (14:36 -0700)]
Various: Add SPL malloc defines

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoomap: spl: fix build break due to changes in FAT
Aneesh V [Fri, 21 Oct 2011 16:29:34 +0000 (12:29 -0400)]
omap: spl: fix build break due to changes in FAT

FAT library now uses malloc() and free(). But SPL doesn't
have heap until now. Setup a heap in SDRAM to fix this issue.

However this increases SPL footprint beyond the available SRAM
budget. So, compile out some fancy features in the SDARM init
bring back footprint under control

CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Wolfgang Denk <wd@denx.de>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
5 years agosf: Add spi_boot() to allow booting from SPI flash in an SPL
Christian Riesch [Fri, 9 Dec 2011 09:47:35 +0000 (09:47 +0000)]
sf: Add spi_boot() to allow booting from SPI flash in an SPL

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
5 years agospl: display_options.o is required for SPI flash support in SPL
Christian Riesch [Fri, 9 Dec 2011 09:47:34 +0000 (09:47 +0000)]
spl: display_options.o is required for SPI flash support in SPL

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
5 years agoam335x: Add support for MMC1
Tom Rini [Tue, 20 Mar 2012 17:37:53 +0000 (10:37 -0700)]
am335x: Add support for MMC1

We now always support HSMMC0 and HSMMC1.  If HSMMC1 is usable will
depend on the hardware configuration.

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoBACKPORT: Improve SPL support for am33xx device
Tom Rini [Tue, 20 Mar 2012 17:31:15 +0000 (10:31 -0700)]
BACKPORT: Improve SPL support for am33xx device

This is a backport from mainline (as of 24c6899).  We now dynamically
determine if we are a FAT or RAW MMC device.

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoam335x: Enable RTC 32K OSC clock AM335XPSP_04.06.00.07 v2011.09_AM335xPSP_04.06.00.07
Vaibhav Hiremath [Thu, 8 Mar 2012 11:45:47 +0000 (17:15 +0530)]
am335x: Enable RTC 32K OSC clock

In order to support low power state, you must source kernel
system timers to persistent clock, available across suspend/resume.
In case of AM335x device, the only source we have is, RTC32K, available
in wakeup/always-on domain.
Having said that, during validation it has been observed that, RTC clock
need couple of seconds delay to stabilize the RTC OSC clock;
and such a huge delay is not acceptable in kernel especially during
early init and also it will impact quick/fast boot use-cases.

So, RTC32k OSC enable dependency has been shifted to SPL/first-bootloader.

In Kernel, in order to support older u-boot version/releases we have
adopted fallback mechanism; where, if timer goes into bad state OR
becomes idle, then we again switch back to main/default sys_ck_in (24MHz).

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
CC: Tom Rini <trini@ti.com>
5 years agoddr_defs: change DDR timings for 15x15 EVM v2011.09_AM335xPSP_04.06.00.06
Chase Maupin [Thu, 9 Feb 2012 19:09:27 +0000 (13:09 -0600)]
ddr_defs: change DDR timings for 15x15 EVM

* For cold silicon the DDR timings need to be relaxed in order for
  the device to boot with DDR at 266MHz
* Fix proposed by James Doublesin

Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
5 years agoomap3beagle: Drop to 800MHz
Tom Rini [Tue, 13 Dec 2011 23:51:18 +0000 (16:51 -0700)]
omap3beagle: Drop to 800MHz

This is the highest frequency supported on xM without BIAS drivers.

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoAM335x: FIX BCH8 error correction
Philip, Avinash [Wed, 7 Dec 2011 16:22:56 +0000 (21:52 +0530)]
AM335x: FIX BCH8 error correction

BCH8 error correction module was wrongly handling in following steps.
1. Method for calculation of the error location.
2. Loading of syndrome polynomial for ELM module.
3. Enabling of GPMC ECC engine done.
This patch fixes the same.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
5 years agoam335x: Corrected nand bootartgs v2011.09_AM335xPSP_04.06.00.03
Philip, Avinash [Tue, 6 Dec 2011 13:14:49 +0000 (18:44 +0530)]
am335x: Corrected nand bootartgs

Nand bootargs is corrected to support UBIFS filesystem as root
filesystem

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
5 years agoam335x: BCH8 error correction for erased pages
Philip, Avinash [Thu, 1 Dec 2011 11:18:37 +0000 (16:48 +0530)]
am335x: BCH8 error correction for erased pages

This patch removes the error checking in case of erased pages.
previously "ECC: uncorrectable." message was coming on reading pages
which was erased and read using BCH8 ecc scheme.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
5 years agoomap3evm: Make the board start at 1GHz
Tom Rini [Thu, 1 Dec 2011 01:13:18 +0000 (18:13 -0700)]
omap3evm: Make the board start at 1GHz

This is TI Sitara SDK specific (run at maximum speed even if it lowers
the lifespan of the part).

Signed-off-by: Tom Rini <trini@ti.com>
5 years agobeagleboard: Make rev C go to 1GHz
Tom Rini [Wed, 30 Nov 2011 23:16:21 +0000 (16:16 -0700)]
beagleboard: Make rev C go to 1GHz

This is TI Sitara SDK specific (run at maximum speed even if it lowers
the lifespan of the part).

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoomap3evm: Add uEnv.txt support
Tom Rini [Wed, 30 Nov 2011 22:12:04 +0000 (15:12 -0700)]
omap3evm: Add uEnv.txt support

Signed-off-by: Tom Rini <trini@ti.com>
5 years agoam335x: Use control interface for setting voltage
Afzal Mohammed [Wed, 30 Nov 2011 15:25:44 +0000 (20:55 +0530)]
am335x: Use control interface for setting voltage

Current code uses SR interface for changing voltage on both Alpha
& Beta EVMs. As per PMIC team control interface should be used.
Effect of this is felt when regulator driver is present in Kernel.
Regulator driver uses control interface and once the driver is
probed PMIC switches to control interface *across* power cycle.
Once PMIC switches to control interface, U-boot cannot set voltage
using SR interface.

1.0D Alpha EVMs have control interface working and this is what
U-boot should be using. On EVMs older than 1.0D Alpha, this patch
will leave voltage at reset defaults (1.1V, 500MHz). Anyway the
older EVMs dont have EEPROM programmed so they will most likely
never hit 720MHz.

Control interface to PMIC is operational on Beta EVMs (as expected)

This patch changes U-boot to use control interface

Signed-off-by: Afzal Mohammed <afzal@ti.com>
5 years agoam33x: Make i2c changes be localized to that platform
Tom Rini [Mon, 28 Nov 2011 22:49:38 +0000 (15:49 -0700)]
am33x: Make i2c changes be localized to that platform

The i2c changes made here are broken on regular omap3 platforms so
isolate them.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoAM3517: Changed default clock rate for AM3517
Schuyler Patton [Thu, 30 Jun 2011 19:55:54 +0000 (14:55 -0500)]
AM3517: Changed default clock rate for AM3517

* Changed #define MPU_M_13_ES2 from 0x1F4 to 0x258, this allows
  the AM3517 to boot up at 600MHz instead of 500 MHz

Upstream-Status: Pending

Signed-off-by: Schuyler Patton <spatton@ti.com>
6 years agoomap3_evm: Added function calls to set volts, speed on OMAP36xx parts
Schuyler Patton [Thu, 30 Jun 2011 18:39:25 +0000 (13:39 -0500)]
omap3_evm: Added function calls to set volts, speed on OMAP36xx parts

* evm.c

*  Added setup calls to set voltage and speed

*  Added calls in misc_init_r to twl4030_power_mpu_init and set_mpu_clock
   functions. These set VDD1 to 1.35v and mpu clock to 1GHz respectively.
   There is a check performed to make sure that this is only called on
   omap36xx class parts.

* twl4030.c

* Added twl4030_power_mpu_init function to set VDD1 to 1.35 Volts

* This is done to allow omap36xx parts to run at 1GHz.

* clock.c

* Added set_mpu_clk function to allow u-boot to set the clock
  rate.

* sys_proto.h

* Added the function prototype set_mpu_clock

* twl4030.h

* Added twl4030_power_mpu_init function prototype

Upstream-Status: Pending

Signed-off-by: Schuyler Patton <spatton@ti.com>
6 years agoam335x: Clean up and comment board/ti/am335x/pmic.h slightly
Tom Rini [Tue, 22 Nov 2011 14:38:39 +0000 (07:38 -0700)]
am335x: Clean up and comment board/ti/am335x/pmic.h slightly

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoomap3: Default NAND to 'nand' not 'onenand', use kloadaddr
Tom Rini [Mon, 21 Nov 2011 19:05:25 +0000 (12:05 -0700)]
omap3: Default NAND to 'nand' not 'onenand', use kloadaddr

The kloadaddr portion is TI Sitara SDK specific (unified user experience,
load uImage to an 'XIP' location).  The onenand->nand change should
be handled a little differently (separate nandboot, onenandboot commands).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoCPSW: Add gigabit_en flag based on the kernel driver, use
Tom Rini [Fri, 18 Nov 2011 21:37:28 +0000 (14:37 -0700)]
CPSW: Add gigabit_en flag based on the kernel driver, use

Using the same logic as the kernel driver, add a gigabit_en flag
that can be used to say if gigabit is supported or not.  Default
to enabled, clear for Bone (for safety), IA (which needs general
work atm) and 1.0 EVMs.  In the CPSW driver, use this flag to set
or clear bit 7 if we're running in gigabit mode.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Make gigabit disable for EVM be 1.0 specific
Tom Rini [Fri, 18 Nov 2011 21:36:44 +0000 (14:36 -0700)]
am335x: Make gigabit disable for EVM be 1.0 specific

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoARM:omap:am335x: Corrects cpsw sa_lo and sa_hi offset
Tom Rini [Fri, 18 Nov 2011 21:35:36 +0000 (14:35 -0700)]
ARM:omap:am335x: Corrects cpsw sa_lo and sa_hi offset

Taken from the kernel:
commit cfcf1f07bfde613aefce57627a19ac51aef862b6
Author: Chandan Nath <chandan.nath@ti.com>
Date:   Fri Oct 21 15:12:06 2011 +0530

    ARM:omap:am335x: Corrects cpsw sa_lo and sa_hi offset

    This patch is added to correct register offset of cpgmac
    sl1 source low register address and cpgmac sl2 source high
    register address. The register offset were 0x21c, 0x220 and
    0x31c, 0x320. Instead they are corrected as 0x220, 0x224 and
    0x320, 0x324. This is corrected by adding missing P1_TS_SEQ_MTYPE
    register in cpsw_slave_reg structure.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agobeagleboard: Load uImage to the default kernel linux address
Tom Rini [Thu, 17 Nov 2011 23:54:01 +0000 (16:54 -0700)]
beagleboard: Load uImage to the default kernel linux address

This is TI Sitara SDK specific (unified user experience, load uImage
to an 'XIP' location).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agobeagleboard: Load uImage from VFAT by default.
Tom Rini [Thu, 17 Nov 2011 15:41:42 +0000 (08:41 -0700)]
beagleboard: Load uImage from VFAT by default.

This is TI Sitara SDK specific (unified user experience, load uImage
from vfat).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x/am3517evm/beagleboard/am37x: Add CONFIG_CMD_ASKENV
Tom Rini [Wed, 16 Nov 2011 21:50:49 +0000 (14:50 -0700)]
am335x/am3517evm/beagleboard/am37x: Add CONFIG_CMD_ASKENV

This is TI Sitara SDK specific (unified user experience, askenv command).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Fix build warning in eth
Tom Rini [Wed, 16 Nov 2011 19:12:04 +0000 (12:12 -0700)]
am335x: Fix build warning in eth

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoAM335x: Increase voltage and CPU frequency for EVMs
Hebbar, Gururaja [Tue, 15 Nov 2011 10:47:16 +0000 (16:17 +0530)]
AM335x: Increase voltage and CPU frequency for EVMs

In order to increase the CPU frequency to 720 MHz, we need to change the
voltages on the TPS65910 for the MPU to be at 1.2625V and the MPU to be
at 1.1375V.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: make way for core voltage switching
Hebbar, Gururaja [Tue, 15 Nov 2011 10:47:15 +0000 (16:17 +0530)]
am335x: make way for core voltage switching

In order to increase the MPU frequency to 720 MHz, MPU needs to be operated at
1.26v. However, on Rev 1.0A EVM, Core also needs to be operated at 1.15v.

Core voltage switching can use the same code as that of mpu voltage
switching with minimal changes.

This patches changes & updates mpu_voltage_update() to voltage_update()
that can handle botm mpu & core voltage switching.

Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com>
6 years agoAM3517 EVM: Add am3517_evm_norflash and _norflash_boot targets
Tom Rini [Tue, 15 Nov 2011 17:23:38 +0000 (10:23 -0700)]
AM3517 EVM: Add am3517_evm_norflash and _norflash_boot targets

These build targets will make a U-Boot that knows about the NOR
flash that can be enabled on this board (see previous commits for
details) and a U-Boot that can run from NOR flash (u-boot.bin).

When we are building to run from NOR flash we makes changes to
the default environment in order to run the system fully from
NOR flash.  This results in a lot of 'noise' in terms of moving
NAND-specific config options to be in one place that we can
key off of.  We also modify the bootcmd to use the flash the
user has chosen (by building for NOR, or NAND).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoAM35xx: Read and set ethaddr for EMAC
Steve Kipisz [Tue, 28 Jun 2011 18:23:13 +0000 (13:23 -0500)]
AM35xx: Read and set ethaddr for EMAC

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3 EVM: Set BOOTDELAY to 3
Tom Rini [Wed, 9 Nov 2011 18:52:44 +0000 (11:52 -0700)]
OMAP3 EVM: Set BOOTDELAY to 3

This is TI Sitara SDK specific (unified user experience, 3s delay).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3 Beagle: Set BOOTDELAY to 3
Tom Rini [Wed, 9 Nov 2011 18:48:21 +0000 (11:48 -0700)]
OMAP3 Beagle: Set BOOTDELAY to 3

This is TI Sitara SDK specific (unified user experience, 3s delay).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: CPSW link speed correction
Chandan Nath [Wed, 9 Nov 2011 06:41:30 +0000 (12:11 +0530)]
am335x: CPSW link speed correction

This patch is added to show link speed correctly. When cpsw
driver autonegotiates to 100 mbps in case connected to 1 gbps
the link speed was showing still as 1000 mbps. This was corrected
in this patch.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
6 years agoAM3517 EVM: Clean up default config
Tom Rini [Tue, 8 Nov 2011 22:23:32 +0000 (15:23 -0700)]
AM3517 EVM: Clean up default config

This adds uEnv.txt (and optargs/uenvcmd) support, changes the bootdelay
to 3 and makes the SD card and nand boot load the kernel to the "save a
relocation" address.  We keep loadaddr itself higher to avoid
accidentially overwriting U-Boot in memory.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoAM3517 CraneBoard: Add SPL support
Tom Rini [Tue, 1 Nov 2011 21:06:11 +0000 (14:06 -0700)]
AM3517 CraneBoard: Add SPL support

The only change of note is that we move from 0x80008000 to 0x80100000
for CONFIG_SYS_TEXT_BASE

Tested-by: Koen Kooi <k-kooi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoAM3517: Add SPL support
Tom Rini [Tue, 1 Nov 2011 20:50:29 +0000 (13:50 -0700)]
AM3517: Add SPL support

The only change of note is that we move from 0x80008000 to 0x80100000
for CONFIG_SYS_TEXT_BASE

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Add SPL support to omap3_evm
Tom Rini [Tue, 13 Sep 2011 22:46:16 +0000 (15:46 -0700)]
OMAP3: Add SPL support to omap3_evm

Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>.  We
don't calculate the MCFG value here for the Micron parts as the provided
one assumes a memory size which is incorrect.  This also changes
CONFIG_SYS_TEXT_BASE to 0x80100000.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Add SPL support to Beagleboard
Tom Rini [Tue, 13 Sep 2011 23:16:22 +0000 (16:16 -0700)]
OMAP3: Add SPL support to Beagleboard

This introduces 200MHz Micron parts timing information based on x-loader
to <asm/arch-omap3/mem.h>.  The memory init logic is also based on what
x-loader does in these cases.  Note that while previously u-boot would
be flashed in with SW ECC in this case it now must be flashed with HW
ECC. We also change CONFIG_SYS_TEXT_BASE to 0x80100000.

Beagleboard rev C5, xM rev A:
Tested-by: Tom Rini <trini@ti.com>
Beagleboard xM rev C:
Tested-by: Matt Ranostay <mranostay@gmail.com>
Beagleboard rev B7, C2, xM rev B:
Tested-by: Matt Porter <mporter@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3 SPL: Add identify_nand_chip function
Tom Rini [Fri, 4 Nov 2011 21:54:21 +0000 (14:54 -0700)]
OMAP3 SPL: Add identify_nand_chip function

A number of boards are populated with a PoP chip for both DDR and NAND
memory.  Other boards may simply use this as an easy way to identify
board revs.  So we provide a function that can be called early to reset
the NAND chip and return the result of NAND_CMD_READID.  All of this
code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3 SPL: Rework memory initalization and devkit8000 support
Tom Rini [Thu, 3 Nov 2011 19:20:01 +0000 (12:20 -0700)]
OMAP3 SPL: Rework memory initalization and devkit8000 support

This changes to making the board be responsible for providing the
memory initialization timings in SPL and converts the devkit8000
to this framework.  In SPL we try and initialize both CS0 and CS1.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Suffix all Micron memory timing parts with their speed
Tom Rini [Thu, 3 Nov 2011 18:56:01 +0000 (11:56 -0700)]
OMAP3: Suffix all Micron memory timing parts with their speed

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Add optimal SDRC autorefresh control values
Tom Rini [Thu, 3 Nov 2011 18:42:45 +0000 (11:42 -0700)]
OMAP3: Add optimal SDRC autorefresh control values

This adds the optimal SDRC autorefresh control register values for
100Mhz, 133MHz, 165MHz and 200MHz clocks.  We switch to using this
to provide the default 165MHz value.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Remove get_mem_type prototype
Tom Rini [Thu, 3 Nov 2011 18:39:15 +0000 (11:39 -0700)]
OMAP3: Remove get_mem_type prototype

This function doesn't exist for omap3

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Change mem_ok to clear again after reading back
Tom Rini [Thu, 3 Nov 2011 18:34:10 +0000 (11:34 -0700)]
OMAP3: Change mem_ok to clear again after reading back

It's possible to need to call this function on the same banks multiple
times so we want to be sure that 'pos A' is cleared out again at the
end.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Add a helper function to set timings in SDRC
Tom Rini [Wed, 14 Sep 2011 22:28:30 +0000 (15:28 -0700)]
OMAP3: Add a helper function to set timings in SDRC

Since we go through the sequence to setup the SDRC timings more than
once, break this logic out into its own function and have that function
call mem_ok() to make sure the memory is usable.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
Tom Rini [Thu, 3 Nov 2011 19:25:16 +0000 (12:25 -0700)]
OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()

We update the comment in make_cs1_contiguous() to be a little bit
more clear (it's been copy/pasted from other silicons) and then
explain in dram_init() why we need to always try this.

Note that in the previous behavior we were always calling this on
boards that never had cs1 populated anyhow so making sure we do
this always is fine and will correct things like omap3evm detecting
an invalid amount of memory (384MB).

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x-evm: Fix bone pmic shut down over USB power
Joel A Fernandes [Fri, 4 Nov 2011 17:30:22 +0000 (12:30 -0500)]
am335x-evm: Fix bone pmic shut down over USB power

* Set DCDC2 to 1.2v for all power sources and board revs except for A1
* Set USB current trip point to 1300mA for all boards and power sources.
* Only Skip setting of MPU frequency to 720MHz for A1 and USB-powered boards.

Credits to Jason for noticing this. Tested with several reboots over USB on a Rev A2/3.

v2 changes:
Take care of not upping DCDC2 and LDO voltages for A1.
For A1- only operation done is to set the USB current limit.

Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
6 years agoOMAP3: Fix emif4 struct definition
Tom Rini [Tue, 1 Nov 2011 20:48:30 +0000 (13:48 -0700)]
OMAP3: Fix emif4 struct definition

The emif4 struct definition was incorrect.  At offset 0x0 is mod_id.
This being missing caused everything else to be off by 0x4.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam3517 evm: Disable D-CACHE for ENET
Tom Rini [Mon, 31 Oct 2011 18:51:24 +0000 (11:51 -0700)]
am3517 evm: Disable D-CACHE for ENET

The davinci emac driver is not d-cache safe so disable that if we have
the emac driver enabled.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agotps65217: Disable frequency switch when no AC power is available
Joel A Fernandes [Fri, 28 Oct 2011 01:50:51 +0000 (20:50 -0500)]
tps65217: Disable frequency switch when no AC power is available

At 720MHz, there is not enough current available from USB to power all the onboard
peripherals. We disable switching to higher frequency by detecting if AC is connected.

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
6 years agoUse EEPROM to select board for PMIC code
Greg Guyotte [Thu, 27 Oct 2011 23:15:49 +0000 (18:15 -0500)]
Use EEPROM to select board for PMIC code

Modified evm.c, spl_board_init() to utilize EEPROM settings
to determine what board we are running on.  For Bone A1,
no PMIC code is executed.  Similarly, if the EEPROM is blank,
no PMIC code is executed.  For any BeagleBone revision other
than A1, the PMIC code is executed (which changes LDO3/LDO4
output voltage, and sets 720MHz).

Signed-off-by: Greg Guyotte <gguyotte@ti.com>
6 years agoam335x: Bring back 10M mode for pre-A3 BeagleBone
Tom Rini [Thu, 27 Oct 2011 17:16:47 +0000 (10:16 -0700)]
am335x: Bring back 10M mode for pre-A3 BeagleBone

We now do a check of the revision field to see if we're a A1/A2
BeagleBone and if so, only setup for 10M mode.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x-evm: Enable MII mode for BeagleBone Rev A3
Steve Kipisz [Wed, 26 Oct 2011 18:03:43 +0000 (13:03 -0500)]
am335x-evm: Enable MII mode for BeagleBone Rev A3

We revert the change the made BeagleBone be 10MBPS only and now
enable 100MBPS on Rev A3 and 10MBPs on A1/A2.  This means MII
mode for A3 and above and RMII mode for A1/A2.

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
6 years agoam335x-evm: Read name field in EEPROM header for BeagleBoard bone detection
Joel A Fernandes [Fri, 21 Oct 2011 00:46:53 +0000 (19:46 -0500)]
am335x-evm: Read name field in EEPROM header for BeagleBoard bone detection

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
6 years agoam335x_evm: single-byte address EEPROM for board identifier
Jason Kridner [Fri, 14 Oct 2011 03:50:35 +0000 (23:50 -0400)]
am335x_evm: single-byte address EEPROM for board identifier

The BeagleBone has an EEPROM that uses a single byte address instead of a
2-byte address used by the EVM versions.  This simply adds a quick attempt
at reading the board identifier header with a 1-byte address if the header
signature isn't correct using a 2-byte address.

This is only build tested.  Having a script to program the expected EEPROM
contents would help me reduce my time to test this.

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Jason Kridner <jdk@ti.com>
6 years agoSet LDO3 and LDO4 output voltage to 3.3v on Bone
Greg Guyotte [Wed, 26 Oct 2011 20:19:47 +0000 (15:19 -0500)]
Set LDO3 and LDO4 output voltage to 3.3v on Bone

Signed-off-by: Greg Guyotte <gguyotte@ti.com>
6 years agoAdd BeagleBone 720MHz support
Greg Guyotte [Wed, 26 Oct 2011 02:19:40 +0000 (21:19 -0500)]
Add BeagleBone 720MHz support

Modified evm.c to provide basic support for TPS65217 PMIC that is
used on BeagleBone.  The code increases the USB current limit to
1300mA, sets the DCDC2 voltage to 1.275V, and the MPU frequency
to 720MHz.

If the TPS65217 does not respond to i2c_probe(), we assume that we
are on the EVM.  This patch was tested to ensure that 720MHz
support continues to work on the EVM as well.

Signed-off-by: Greg Guyotte <gguyotte@ti.com>
6 years agoChange CPU to 720MHz and bump VDD1 to 1.26V
Greg Guyotte [Thu, 20 Oct 2011 01:43:33 +0000 (20:43 -0500)]
Change CPU to 720MHz and bump VDD1 to 1.26V

Signed-off-by: Greg Guyotte <gguyotte@ti.com>
6 years agoAdd missing i2c0 pin mux configuration in spl_board_init
Vaibhav Hiremath [Thu, 20 Oct 2011 13:29:04 +0000 (18:59 +0530)]
Add missing i2c0 pin mux configuration in spl_board_init

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
6 years agoam335x: Force 10Mbit ethernet on BeagleBone
Tom Rini [Wed, 19 Oct 2011 19:55:02 +0000 (12:55 -0700)]
am335x: Force 10Mbit ethernet on BeagleBone

Due to issues that are still to be fully root caused we need
to force ethernet to be at 10Mbit on the BeagleBone for the
time being in order to be able to have functional Rx.

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Enable CONFIG_SPL_BOARD_INIT
Tom Rini [Wed, 19 Oct 2011 15:24:32 +0000 (08:24 -0700)]
am335x: Enable CONFIG_SPL_BOARD_INIT

Vaibhav Bedia root-caused the SPL hang that is seen sometimes
as a problem of calling code that requires the BSS to be cleared
(and thus must be called post relocation) being called before.
The spl_board_init() hook is where we want to make this call now,
and i2c_init has already been taken care of for us.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoOMAP SPL: Add CONFIG_SPL_BOARD_INIT hook
Tom Rini [Wed, 19 Oct 2011 15:23:16 +0000 (08:23 -0700)]
OMAP SPL: Add CONFIG_SPL_BOARD_INIT hook

Some boards need to perform tasks post relocation and prior to
loading the image, so we add a hook and CONFIG option for this.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoti8148: Re-enable ethernet support
Tom Rini [Thu, 13 Oct 2011 19:18:34 +0000 (12:18 -0700)]
ti8148: Re-enable ethernet support

Complete conversion of PHY registers to <linux/mii.h> names.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Remove NOP instructions in voltage scaling
Vaibhav Bedia [Tue, 18 Oct 2011 04:37:09 +0000 (10:07 +0530)]
am335x: Remove NOP instructions in voltage scaling

SR I2C interface of the PMIC does not have access to all
the PMIC registers. However, the code for voltage change
was configuring some additional registers via the SR I2C
interface. Writes to these registes does not return a NACK
but it ends up as NOPs.

Refer to http://www.ti.com/lit/gpn/tps65910 for more details.

Note: Voltage change is unaffected by this change.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
6 years agoam335x: Clean up voltage changes
Tom Rini [Wed, 12 Oct 2011 20:48:43 +0000 (13:48 -0700)]
am335x: Clean up voltage changes

Largely whitespace cleanup.  Rewrote error condition checking in
mpu_voltage_update().

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Convert mpu voltage framework to SPL, make safe for BeagleBone
Tom Rini [Wed, 12 Oct 2011 20:34:08 +0000 (13:34 -0700)]
am335x: Convert mpu voltage framework to SPL, make safe for BeagleBone

The current versions of BeagleBone can only be run safely at
500MHz so change the initial frequency we run at to be 500MHz.  We
add i2c_init() call into s_init() so that we can scale up on EVMs
to 600.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoAM335x: Corrected MPU voltage switching.
Philip, Avinash [Wed, 21 Sep 2011 06:05:27 +0000 (11:35 +0530)]
AM335x: Corrected MPU voltage switching.

VDD_MPU is connected to VDD1_SMPS on latest schematic. This fix is to
correct the same.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
6 years agoAM335x: DDR for 266 MHz.
Philip, Avinash [Thu, 15 Sep 2011 11:33:41 +0000 (17:03 +0530)]
AM335x: DDR for 266 MHz.

DDR clock rate is updated to 266 MHz.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
6 years agoAM335x: Support for MPU clock switch to 600MHz.
Philip, Avinash [Mon, 19 Sep 2011 11:56:34 +0000 (17:26 +0530)]
AM335x: Support for MPU clock switch to 600MHz.

This patch supports for MPU clock to run at 600 MHz. First switch the
MPU clock to 550 MHZ as the MPU voltage set by PMIC is 1.1V. Delaying
the MPU clock switch to 600 MHz, as I2C drivers for PMIC access is
available only after DDR initialization. After PMIC voltage for MPU is
switched to 1.2V, MPU clock is updated to 600 MHz.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
6 years agoSPL: Enable YMODEM support on BeagleBone and AM335x EVM
Matt Porter [Wed, 12 Oct 2011 16:54:51 +0000 (12:54 -0400)]
SPL: Enable YMODEM support on BeagleBone and AM335x EVM

Signed-off-by: Matt Porter <mporter@ti.com>
6 years agoSPL: Enable YMODEM support on AM3874/TI8148 EVM
Matt Porter [Wed, 12 Oct 2011 13:16:34 +0000 (09:16 -0400)]
SPL: Enable YMODEM support on AM3874/TI8148 EVM

Signed-off-by: Matt Porter <mporter@ti.com>
6 years agoSPL: Add YMODEM over UART load support
Matt Porter [Wed, 12 Oct 2011 13:13:40 +0000 (09:13 -0400)]
SPL: Add YMODEM over UART load support

Adds support for loading U-Boot from UART using YMODEM protocol.
If YMODEM support is enabled in SPL and the romcode indicates
that SPL loaded via UART then SPL will wait for start of a
YMODEM transfer via the console port.

Signed-off-by: Matt Porter <mporter@ti.com>
6 years agoam335x: Make ethernet work on both EVM and Bone
Joel A Fernandes [Tue, 11 Oct 2011 23:19:10 +0000 (18:19 -0500)]
am335x: Make ethernet work on both EVM and Bone

Now that we have a BONE_BOARD board_id, we rework the end of
board_eth_init a little bit.  In the case of BONE, we need to
enable RMII.  In the case of IA (already handled) we need to
do something else, and for any other board we need to set MII
mode to RGMII.

Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Add pin mux profile for the BeagleBone
Steven Kipisz [Tue, 11 Oct 2011 23:17:07 +0000 (18:17 -0500)]
am335x: Add pin mux profile for the BeagleBone

We need to add another pin mux profile to handle this board.
The difference between the regular gp profile and the beaglebone
is rmii rather than rgmii for ethernet.  We also need to add a fix
to the cpsw driver for 100 mode.

Signed-off-by: Steven Kipisz <s-kipisz2@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoarch-ti81xx: Turn on clocks for GPIO bank 0
Steve Kipisz [Wed, 28 Sep 2011 02:55:13 +0000 (21:55 -0500)]
arch-ti81xx: Turn on clocks for GPIO bank 0

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
6 years agoam335x: Change evm_phy_init TLK110 test / print
Tom Rini [Tue, 11 Oct 2011 21:14:21 +0000 (14:14 -0700)]
am335x: Change evm_phy_init TLK110 test / print

Clean up this test to try one read, then the other and if it fails
print out what this means rather than just that the read failed.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Clean up the config file, add uEnv.txt
Tom Rini [Tue, 11 Oct 2011 16:46:14 +0000 (09:46 -0700)]
am335x: Clean up the config file, add uEnv.txt

This removes a bunch of legacy options that SPL now takes care of for
us, does some style clean-ups and adds uEnv.txt support based on
Beagleboard, along with optargs also from Beagleboard and corrects
the clock frequency for the timer.  To achieve faster boot times
we add kloadaddr which is the default kernel address minus the uImage
header and make use of this in the various possible bootcmds.  This
lets us avoid a copy of the kernel image.

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Koen Kooi <k-kooi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x: Drop CONFIG_DISPLAY_CHECKBOARD
Tom Rini [Tue, 11 Oct 2011 16:23:48 +0000 (09:23 -0700)]
am335x: Drop CONFIG_DISPLAY_CHECKBOARD

This function is now empty, drop.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoam335x evm: Switch to DEBUG, debug() and printf()
Tom Rini [Mon, 10 Oct 2011 22:18:52 +0000 (15:18 -0700)]
am335x evm: Switch to DEBUG, debug() and printf()

Now that we use SPL we can safely have printf statements in the code
and not need to special case them.  Also switch some statements to
debug() and use DEBUG rather than a custom DEBUG define when we have
code that is only really used for debugging.

Signed-off-by: Tom Rini <trini@ti.com>
6 years agoSPL: Remove massive amount of pinmux data being allocated on the stack
Matt Porter [Fri, 7 Oct 2011 21:05:19 +0000 (17:05 -0400)]
SPL: Remove massive amount of pinmux data being allocated on the stack

Cleaning this up because it's generally bad practice to bloat stack
usage in low-level code. Simply convert to a static for now.

Signed-off-by: Matt Porter <mporter@ti.com>